Lines Matching +full:0 +full:x20108000
15 #size-cells = <0>;
17 cpu0: cpu@0 {
23 reg = <0>;
173 #clock-cells = <0>;
178 mboxes = <&mbox 0>;
189 reg = <0x0 0x2010000 0x0 0x1000>;
201 reg = <0x0 0x2000000 0x0 0xC000>;
210 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
211 reg = <0x0 0xc000000 0x0 0x4000000>;
212 #address-cells = <0>;
225 reg = <0x0 0x3000000 0x0 0x8000>;
234 reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>;
241 reg = <0x0 0x20000000 0x0 0x400>;
253 reg = <0x0 0x20100000 0x0 0x400>;
265 reg = <0x0 0x20102000 0x0 0x400>;
277 reg = <0x0 0x20104000 0x0 0x400>;
289 reg = <0x0 0x20106000 0x0 0x400>;
302 reg = <0x0 0x20008000 0x0 0x1000>;
313 #size-cells = <0>;
314 reg = <0x0 0x20108000 0x0 0x1000>;
324 #size-cells = <0>;
325 reg = <0x0 0x20109000 0x0 0x1000>;
335 #size-cells = <0>;
336 reg = <0x0 0x21000000 0x0 0x1000>;
345 reg = <0x0 0x2010a000 0x0 0x1000>;
347 #size-cells = <0>;
357 reg = <0x0 0x2010b000 0x0 0x1000>;
359 #size-cells = <0>;
369 reg = <0x0 0x2010c000 0x0 0x1000>;
378 reg = <0x0 0x2010d000 0x0 0x1000>;
387 reg = <0x0 0x20110000 0x0 0x2000>;
389 #size-cells = <0>;
400 reg = <0x0 0x20112000 0x0 0x2000>;
402 #size-cells = <0>;
413 reg = <0x0 0x20120000 0x0 0x1000>;
425 reg = <0x0 0x20121000 0x0 0x1000>;
437 reg = <0x0 0x20122000 0x0 0x1000>;
449 reg = <0x0 0x20124000 0x0 0x1000>;
459 reg = <0x0 0x20201000 0x0 0x1000>;
469 reg = <0x0 0x37020000 0x0 0x1000>, <0x0 0x2000318C 0x0 0x40>;