Lines Matching +full:mpfs +full:- +full:clock
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2022 Microchip Technology Inc */
4 /dts-v1/;
6 #include "mpfs.dtsi"
7 #include "mpfs-polarberry-fabric.dtsi"
9 /* Clock frequency (in Hz) of the rtcclk */
14 compatible = "sundance,polarberry", "microchip,mpfs";
22 stdout-path = "serial0:115200n8";
26 timebase-frequency = <MTIMER_FREQ>;
45 phy-mode = "sgmii";
46 phy-handle = <&phy0>;
51 phy-mode = "sgmii";
52 phy-handle = <&phy1>;
55 phy1: ethernet-phy@5 {
59 phy0: ethernet-phy@4 {
69 bus-width = <4>;
70 disable-wp;
71 cap-sd-highspeed;
72 cap-mmc-highspeed;
73 mmc-ddr-1_8v;
74 mmc-hs200-1_8v;
75 sd-uhs-sdr12;
76 sd-uhs-sdr25;
77 sd-uhs-sdr50;
78 sd-uhs-sdr104;
87 clock-frequency = <125000000>;