48  * First stop state levels when SPR and TB loss can occur.
363 			 * loss. Fast sleep still has to resync the timebase so  in power7_idle_insn()
419 	/* HV state loss */  in power7_idle_insn()
655 		  * after a state-loss idle. Saving and restoring MMCR0  in power9_idle_stop()
738 	 * SRR1_WS_GPRLOSS (10b) can also result in SPR loss, so  in power9_idle_stop()
739 	 * just always test PSSCR for SPR/TB state loss.  in power9_idle_stop()
748 	/* HV state loss */  in power9_idle_stop()
762 		/* TB loss */  in power9_idle_stop()
924 		/* XXX: save SPRs for deep state loss here. */  in power10_idle_stop()
943 	 * SRR1_WS_GPRLOSS (10b) can also result in SPR loss, so  in power10_idle_stop()
944 	 * just always test PSSCR for SPR/TB state loss.  in power10_idle_stop()
953 	/* HV state loss */  in power10_idle_stop()
964 		/* TB loss */  in power10_idle_stop()
1109  *	Bit 42 - Enable State Loss
1111  *	1 - Allows state loss
1181 	 * the deepest loss-less (OPAL_PM_STOP_INST_FAST) stop state.  in pnv_arch300_idle_init()
1190 		/* No deep loss driver implemented for POWER10 yet */  in pnv_arch300_idle_init()
1204 		 * The idle code does not deal with TB loss occurring  in pnv_arch300_idle_init()
1205 		 * in a shallower state than SPR loss, so force it to  in pnv_arch300_idle_init()