Lines Matching +full:smp +full:- +full:sram
1 // SPDX-License-Identifier: GPL-2.0-only
5 * X-ES board-specific functionality
9 * Author: Nate Case <ncase@xes-inc.com>
24 #include <asm/pci-bridge.h>
31 #include "smp.h"
38 #define MPC85xx_L2CTL_L2SIZ_MASK 0x30000000 /* L2 SRAM size (R/O) */
56 * xMon may have enabled part of L2 as SRAM, so we need to set it in xes_mpc85xx_configure_l2()
65 * Assume L2 SRAM is used fully for cache, so set in xes_mpc85xx_configure_l2()
81 * Legacy xMon firmware on some X-ES boards does not enable L2 in xes_mpc85xx_fixups()
84 for_each_node_by_name(np, "l2-cache-controller") { in xes_mpc85xx_fixups()
90 "fsl,mpc8548-l2-cache-controller") && in xes_mpc85xx_fixups()
92 "fsl,mpc8540-l2-cache-controller") && in xes_mpc85xx_fixups()
94 "fsl,mpc8560-l2-cache-controller")) in xes_mpc85xx_fixups()
125 printk(KERN_INFO "X-ES MPC85xx-based single-board computer: %s\n", in xes_mpc85xx_setup_arch()
140 * Called very early, device-tree isn't unflattened
158 .name = "X-ES MPC8572", in define_machine()
172 .name = "X-ES MPC8548", in define_machine()
186 .name = "X-ES MPC8540", in define_machine()