418  *   SYS -> CSB -> IPS) from the REF clock rate and the returned mul/div
457 		calc_freq *= *ips_div;	/* IPS -> CSB */  in mpc512x_clk_setup_ref_clock()
458 		calc_freq *= 2;		/* CSB -> SYS */  in mpc512x_clk_setup_ref_clock()
640 	 * CSB which is greater than IPS; the serial port setup may have  in mpc512x_clk_setup_mclk()
734 	/* now setup the REF -> SYS -> CSB -> IPS hierarchy */  in mpc512x_clk_setup_clock_tree()
737 	clks[MPC512x_CLK_CSB] = mpc512x_clk_factor("csb", "sys", 1, 2);  in mpc512x_clk_setup_clock_tree()
738 	clks[MPC512x_CLK_IPS] = mpc512x_clk_divtable("ips", "csb",  in mpc512x_clk_setup_clock_tree()
741 	/* now setup anything below SYS and CSB and IPS */  in mpc512x_clk_setup_clock_tree()
756 	clks[MPC512x_CLK_SDHC_x4] = mpc512x_clk_factor("sdhc-x4", "csb", 2, 1);  in mpc512x_clk_setup_clock_tree()
766 	clks[MPC512x_CLK_DIU_x4] = mpc512x_clk_factor("diu-x4", "csb", 4, 1);  in mpc512x_clk_setup_clock_tree()
780 	clks[MPC512x_CLK_E300] = mpc512x_clk_factor("e300", "csb", mul, div);  in mpc512x_clk_setup_clock_tree()
784 				"mbx-bus-ug", "csb", 1, 2);  in mpc512x_clk_setup_clock_tree()
793 				"pci-ug", "csb", &clkregs->scfr1,  in mpc512x_clk_setup_clock_tree()
851 				"axe", "csb", &clkregs->sccr2, 30);  in mpc512x_clk_setup_clock_tree()
855 	clks[MPC512x_CLK_USB1] = mpc512x_clk_gated("usb1", "csb",  in mpc512x_clk_setup_clock_tree()
857 	clks[MPC512x_CLK_USB2] = mpc512x_clk_gated("usb2", "csb",  in mpc512x_clk_setup_clock_tree()
882 	clks[MPC512x_CLK_IIM] = mpc512x_clk_gated("iim", "csb",  in mpc512x_clk_setup_clock_tree()
886 				"viu", "csb", &clkregs->sccr2, 18);  in mpc512x_clk_setup_clock_tree()