1694 		out_le32((u32 *)(addr + offset), val);  in ppc4xx_pciex_write_config()
1738 		out_le32(mbase + PECFG_POM0LAH, pciah);  in ppc4xx_setup_one_pciex_POM()
1739 		out_le32(mbase + PECFG_POM0LAL, pcial);  in ppc4xx_setup_one_pciex_POM()
1761 		out_le32(mbase + PECFG_POM1LAH, pciah);  in ppc4xx_setup_one_pciex_POM()
1762 		out_le32(mbase + PECFG_POM1LAL, pcial);  in ppc4xx_setup_one_pciex_POM()
1770 		out_le32(mbase + PECFG_POM2LAH, pciah);  in ppc4xx_setup_one_pciex_POM()
1771 		out_le32(mbase + PECFG_POM2LAL, pcial);  in ppc4xx_setup_one_pciex_POM()
1860 		out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));  in ppc4xx_configure_pciex_PIMs()
1861 		out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa) |  in ppc4xx_configure_pciex_PIMs()
1865 		out_le32(mbase + PECFG_BAR1MPA, 0);  in ppc4xx_configure_pciex_PIMs()
1866 		out_le32(mbase + PECFG_BAR2HMPA, 0);  in ppc4xx_configure_pciex_PIMs()
1867 		out_le32(mbase + PECFG_BAR2LMPA, 0);  in ppc4xx_configure_pciex_PIMs()
1869 		out_le32(mbase + PECFG_PIM01SAH, RES_TO_U32_HIGH(sa));  in ppc4xx_configure_pciex_PIMs()
1870 		out_le32(mbase + PECFG_PIM01SAL, RES_TO_U32_LOW(sa));  in ppc4xx_configure_pciex_PIMs()
1872 		out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(ep_addr));  in ppc4xx_configure_pciex_PIMs()
1873 		out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(ep_addr));  in ppc4xx_configure_pciex_PIMs()
1887 		out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));  in ppc4xx_configure_pciex_PIMs()
1888 		out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa));  in ppc4xx_configure_pciex_PIMs()
1893 		out_le32(mbase + PECFG_PIM0LAL, 0x00000000);  in ppc4xx_configure_pciex_PIMs()
1894 		out_le32(mbase + PECFG_PIM0LAH, 0x00000000);  in ppc4xx_configure_pciex_PIMs()
1895 		out_le32(mbase + PECFG_PIM1LAL, 0x00000000);  in ppc4xx_configure_pciex_PIMs()
1896 		out_le32(mbase + PECFG_PIM1LAH, 0x00000000);  in ppc4xx_configure_pciex_PIMs()
1897 		out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);  in ppc4xx_configure_pciex_PIMs()
1898 		out_le32(mbase + PECFG_PIM01SAL, 0x00000000);  in ppc4xx_configure_pciex_PIMs()
1900 		out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));  in ppc4xx_configure_pciex_PIMs()
1901 		out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));  in ppc4xx_configure_pciex_PIMs()
1905 	out_le32(mbase + PECFG_PIMEN, 0x1);  in ppc4xx_configure_pciex_PIMs()
2003 	out_le32(mbase + PECFG_PIMEN, 0);  in ppc4xx_pciex_port_setup_hose()
2054 		out_le32(mbase + 0x208, 0x06040001);  in ppc4xx_pciex_port_setup_hose()
2060 		out_le32(mbase + 0x208, 0x0b200001);  in ppc4xx_pciex_port_setup_hose()