Lines Matching +full:0 +full:x1234
19 #define IGNORE_GPR(n) (0x1UL << (n))
20 #define IGNORE_XER (0x1UL << 32)
21 #define IGNORE_CCR (0x1UL << 33)
22 #define NEGATIVE_TEST (0x1UL << 63)
61 memset(regs, 0, sizeof(struct pt_regs)); in init_pt_regs()
68 asm volatile("mfmsr %0" : "=r"(regs->msr)); in init_pt_regs()
92 unsigned long a = 0x23; in test_ld()
98 /* ld r5, 0(r3) */ in test_ld()
99 stepped = emulate_step(®s, ppc_inst(PPC_RAW_LD(5, 3, 0))); in test_ld()
110 unsigned long a = 0x23; in test_pld()
121 /* pld r5, 0(r3), 0 */ in test_pld()
122 stepped = emulate_step(®s, TEST_PLD(5, 3, 0, 0)); in test_pld()
133 unsigned int a = 0x4545; in test_lwz()
139 /* lwz r5, 0(r3) */ in test_lwz()
140 stepped = emulate_step(®s, ppc_inst(PPC_RAW_LWZ(5, 3, 0))); in test_lwz()
151 unsigned int a = 0x4545; in test_plwz()
162 /* plwz r5, 0(r3), 0 */ in test_plwz()
164 stepped = emulate_step(®s, TEST_PLWZ(5, 3, 0, 0)); in test_plwz()
175 unsigned int a[3] = {0x0, 0x0, 0x1234}; in test_lwzx()
181 regs.gpr[5] = 0x8765; in test_lwzx()
194 unsigned long a = 0x1234; in test_std()
199 regs.gpr[5] = 0x5678; in test_std()
201 /* std r5, 0(r3) */ in test_std()
202 stepped = emulate_step(®s, ppc_inst(PPC_RAW_STD(5, 3, 0))); in test_std()
212 unsigned long a = 0x1234; in test_pstd()
222 regs.gpr[5] = 0x5678; in test_pstd()
224 /* pstd r5, 0(r3), 0 */ in test_pstd()
225 stepped = emulate_step(®s, TEST_PSTD(5, 3, 0, 0)); in test_pstd()
235 unsigned long a = 0x1234; in test_ldarx_stdcx()
237 unsigned long cr0_eq = 0x1 << 29; /* eq bit of CR0 */ in test_ldarx_stdcx()
240 asm volatile("mfcr %0" : "=r"(regs.ccr)); in test_ldarx_stdcx()
246 regs.gpr[4] = 0; in test_ldarx_stdcx()
247 regs.gpr[5] = 0x5678; in test_ldarx_stdcx()
249 /* ldarx r5, r3, r4, 0 */ in test_ldarx_stdcx()
250 stepped = emulate_step(®s, ppc_inst(PPC_RAW_LDARX(5, 3, 4, 0))); in test_ldarx_stdcx()
257 if (stepped <= 0 || regs.gpr[5] != 0x1234) { in test_ldarx_stdcx()
265 regs.gpr[5] = 0x9ABC; in test_ldarx_stdcx()
276 * In this case cr0.eq bit will be set to 0. in test_ldarx_stdcx()
305 regs.gpr[4] = 0; in test_lfsx_stfsx()
354 /* plfs frt10, 0(r3), 0 */ in test_plfs_pstfs()
355 stepped = emulate_step(®s, TEST_PLFS(10, 3, 0, 0)); in test_plfs_pstfs()
367 /* pstfs frs10, 0(r3), 0 */ in test_plfs_pstfs()
368 stepped = emulate_step(®s, TEST_PSTFS(10, 3, 0, 0)); in test_plfs_pstfs()
395 regs.gpr[4] = 0; in test_lfdx_stfdx()
444 /* plfd frt10, 0(r3), 0 */ in test_plfd_pstfd()
445 stepped = emulate_step(®s, TEST_PLFD(10, 3, 0, 0)); in test_plfd_pstfd()
457 /* pstfd frs10, 0(r3), 0 */ in test_plfd_pstfd()
458 stepped = emulate_step(®s, TEST_PSTFD(10, 3, 0, 0)); in test_plfd_pstfd()
507 cached_b[0] = c.b[0] = 923745; in test_lvx_stvx()
513 regs.gpr[4] = 0; in test_lvx_stvx()
526 c.b[0] = 4987513; in test_lvx_stvx()
534 if (stepped == 1 && cached_b[0] == c.b[0] && cached_b[1] == c.b[1] && in test_lvx_stvx()
564 cached_b[0] = c.b[0] = 18233; in test_lxvd2x_stxvd2x()
570 regs.gpr[4] = 0; in test_lxvd2x_stxvd2x()
587 c.b[0] = 21379463; in test_lxvd2x_stxvd2x()
595 if (stepped == 1 && cached_b[0] == c.b[0] && cached_b[1] == c.b[1] && in test_lxvd2x_stxvd2x()
635 cached_b[0] = c[0].b[0] = 18233; in test_lxvp_stxvp()
636 cached_b[1] = c[0].b[1] = 34863571; in test_lxvp_stxvp()
637 cached_b[2] = c[0].b[2] = 834; in test_lxvp_stxvp()
638 cached_b[3] = c[0].b[3] = 6138911; in test_lxvp_stxvp()
639 cached_b[4] = c[1].b[0] = 1234; in test_lxvp_stxvp()
644 regs.gpr[4] = (unsigned long)&c[0].a; in test_lxvp_stxvp()
649 * let TX=1 Tp=1 RA=4 DQ=0 in test_lxvp_stxvp()
651 stepped = emulate_step(®s, ppc_inst(PPC_RAW_LXVP(34, 4, 0))); in test_lxvp_stxvp()
664 c[0].b[0] = 21379463; in test_lxvp_stxvp()
665 c[0].b[1] = 87; in test_lxvp_stxvp()
666 c[0].b[2] = 374234; in test_lxvp_stxvp()
667 c[0].b[3] = 4; in test_lxvp_stxvp()
668 c[1].b[0] = 90; in test_lxvp_stxvp()
676 * let SX=1 Sp=1 RA=4 DQ=0 in test_lxvp_stxvp()
678 stepped = emulate_step(®s, ppc_inst(PPC_RAW_STXVP(34, 4, 0))); in test_lxvp_stxvp()
680 if (stepped == 1 && cached_b[0] == c[0].b[0] && cached_b[1] == c[0].b[1] && in test_lxvp_stxvp()
681 cached_b[2] == c[0].b[2] && cached_b[3] == c[0].b[3] && in test_lxvp_stxvp()
682 cached_b[4] == c[1].b[0] && cached_b[5] == c[1].b[1] && in test_lxvp_stxvp()
722 cached_b[0] = c[0].b[0] = 18233; in test_lxvpx_stxvpx()
723 cached_b[1] = c[0].b[1] = 34863571; in test_lxvpx_stxvpx()
724 cached_b[2] = c[0].b[2] = 834; in test_lxvpx_stxvpx()
725 cached_b[3] = c[0].b[3] = 6138911; in test_lxvpx_stxvpx()
726 cached_b[4] = c[1].b[0] = 1234; in test_lxvpx_stxvpx()
731 regs.gpr[3] = (unsigned long)&c[0].a; in test_lxvpx_stxvpx()
732 regs.gpr[4] = 0; in test_lxvpx_stxvpx()
752 c[0].b[0] = 21379463; in test_lxvpx_stxvpx()
753 c[0].b[1] = 87; in test_lxvpx_stxvpx()
754 c[0].b[2] = 374234; in test_lxvpx_stxvpx()
755 c[0].b[3] = 4; in test_lxvpx_stxvpx()
756 c[1].b[0] = 90; in test_lxvpx_stxvpx()
768 if (stepped == 1 && cached_b[0] == c[0].b[0] && cached_b[1] == c[0].b[1] && in test_lxvpx_stxvpx()
769 cached_b[2] == c[0].b[2] && cached_b[3] == c[0].b[3] && in test_lxvpx_stxvpx()
770 cached_b[4] == c[1].b[0] && cached_b[5] == c[1].b[1] && in test_lxvpx_stxvpx()
809 cached_b[0] = c[0].b[0] = 18233; in test_plxvp_pstxvp()
810 cached_b[1] = c[0].b[1] = 34863571; in test_plxvp_pstxvp()
811 cached_b[2] = c[0].b[2] = 834; in test_plxvp_pstxvp()
812 cached_b[3] = c[0].b[3] = 6138911; in test_plxvp_pstxvp()
813 cached_b[4] = c[1].b[0] = 1234; in test_plxvp_pstxvp()
819 regs.gpr[3] = (unsigned long)&c[0].a; in test_plxvp_pstxvp()
824 * let RA=3 R=0 D=d0||d1=0 R=0 Tp=1 TX=1 in test_plxvp_pstxvp()
826 instr = ppc_inst_prefix(PPC_RAW_PLXVP_P(34, 0, 3, 0), PPC_RAW_PLXVP_S(34, 0, 3, 0)); in test_plxvp_pstxvp()
840 c[0].b[0] = 21379463; in test_plxvp_pstxvp()
841 c[0].b[1] = 87; in test_plxvp_pstxvp()
842 c[0].b[2] = 374234; in test_plxvp_pstxvp()
843 c[0].b[3] = 4; in test_plxvp_pstxvp()
844 c[1].b[0] = 90; in test_plxvp_pstxvp()
852 * let RA=3 D=d0||d1=0 R=0 Sp=1 SX=1 in test_plxvp_pstxvp()
854 instr = ppc_inst_prefix(PPC_RAW_PSTXVP_P(34, 0, 3, 0), PPC_RAW_PSTXVP_S(34, 0, 3, 0)); in test_plxvp_pstxvp()
858 if (stepped == 1 && cached_b[0] == c[0].b[0] && cached_b[1] == c[0].b[1] && in test_plxvp_pstxvp()
859 cached_b[2] == c[0].b[2] && cached_b[3] == c[0].b[3] && in test_plxvp_pstxvp()
860 cached_b[4] == c[1].b[0] && cached_b[5] == c[1].b[1] && in test_plxvp_pstxvp()
924 .gpr[0] = LONG_MAX,
937 .ccr = 0x4000000,
944 .ccr = 0x8000,
951 .ccr = 0x200,
992 .descr = "RA = ULONG_MAX, RB = 0x1",
996 .gpr[22] = 0x1,
1032 .descr = "RA = UINT_MAX, RB = 0x1",
1036 .gpr[22] = 0x1,
1079 .descr = "RA = ULONG_MAX, RB = 0x1",
1083 .gpr[22] = 0x1,
1119 .descr = "RA = UINT_MAX, RB = 0x1",
1123 .gpr[22] = 0x1,
1164 .descr = "RA = ULONG_MAX, RB = 0x1",
1168 .gpr[22] = 0x1,
1204 .descr = "RA = UINT_MAX, RB = 0x1",
1208 .gpr[22] = 0x1,
1259 .descr = "RA = ULONG_MAX, RB = 0x1",
1263 .gpr[22] = 0x1,
1299 .descr = "RA = UINT_MAX, RB = 0x1",
1303 .gpr[22] = 0x1,
1328 .descr = "RA = 1L, RB = 0",
1333 .gpr[22] = 0,
1358 .descr = "RA = 1L, RB = 0",
1363 .gpr[22] = 0,
1389 .descr = "RA = 1L, RB = 0",
1394 .gpr[22] = 0,
1437 .descr = "RA = 1L, RB = 0",
1442 .gpr[22] = 0,
1477 .descr = "RA = LONG_MIN, SI = SI_MIN, R = 0",
1478 .instr = TEST_PADDI(21, 22, SI_MIN, 0),
1480 .gpr[21] = 0,
1485 .descr = "RA = LONG_MIN, SI = SI_MAX, R = 0",
1486 .instr = TEST_PADDI(21, 22, SI_MAX, 0),
1488 .gpr[21] = 0,
1493 .descr = "RA = LONG_MAX, SI = SI_MAX, R = 0",
1494 .instr = TEST_PADDI(21, 22, SI_MAX, 0),
1496 .gpr[21] = 0,
1501 .descr = "RA = ULONG_MAX, SI = SI_UMAX, R = 0",
1502 .instr = TEST_PADDI(21, 22, SI_UMAX, 0),
1504 .gpr[21] = 0,
1509 .descr = "RA = ULONG_MAX, SI = 0x1, R = 0",
1510 .instr = TEST_PADDI(21, 22, 0x1, 0),
1512 .gpr[21] = 0,
1517 .descr = "RA = INT_MIN, SI = SI_MIN, R = 0",
1518 .instr = TEST_PADDI(21, 22, SI_MIN, 0),
1520 .gpr[21] = 0,
1525 .descr = "RA = INT_MIN, SI = SI_MAX, R = 0",
1526 .instr = TEST_PADDI(21, 22, SI_MAX, 0),
1528 .gpr[21] = 0,
1533 .descr = "RA = INT_MAX, SI = SI_MAX, R = 0",
1534 .instr = TEST_PADDI(21, 22, SI_MAX, 0),
1536 .gpr[21] = 0,
1541 .descr = "RA = UINT_MAX, SI = 0x1, R = 0",
1542 .instr = TEST_PADDI(21, 22, 0x1, 0),
1544 .gpr[21] = 0,
1549 .descr = "RA = UINT_MAX, SI = SI_MAX, R = 0",
1550 .instr = TEST_PADDI(21, 22, SI_MAX, 0),
1552 .gpr[21] = 0,
1557 .descr = "RA is r0, SI = SI_MIN, R = 0",
1558 .instr = TEST_PADDI(21, 0, SI_MIN, 0),
1560 .gpr[21] = 0x0,
1564 .descr = "RA = 0, SI = SI_MIN, R = 0",
1565 .instr = TEST_PADDI(21, 22, SI_MIN, 0),
1567 .gpr[21] = 0x0,
1568 .gpr[22] = 0x0,
1572 .descr = "RA is r0, SI = 0, R = 1",
1573 .instr = TEST_PADDI(21, 0, 0, 1),
1575 .gpr[21] = 0,
1580 .instr = TEST_PADDI(21, 0, SI_MIN, 1),
1582 .gpr[21] = 0,
1585 /* Invalid instruction form with R = 1 and RA != 0 */
1587 .descr = "RA = R22(0), SI = 0, R = 1",
1588 .instr = TEST_PADDI(21, 22, 0, 1),
1591 .gpr[21] = 0,
1592 .gpr[22] = 0,
1623 return 0; in emulate_compute_instr()
1641 return 0; in execute_compute_instr()
1645 pr_info("GPR%u mismatch, exp = 0x%016lx, got = 0x%016lx\n", \
1649 pr_info("%s mismatch, exp = 0x%016lx, got = 0x%016lx\n", \
1661 for (i = 0; i < ARRAY_SIZE(compute_tests); i++) { in run_tests_compute()
1669 for (j = 0; j < MAX_SUBTESTS && test->subtests[j].descr; j++) { in run_tests_compute()
1688 rc = emulate_compute_instr(&got, instr, negative) != 0; in run_tests_compute()
1699 for (k = 0; k < 32; k++) { in run_tests_compute()
1739 return 0; in test_emulate_step()