Lines Matching +full:3 +full:rd
33 #define VSX_REGISTER_XTP(rd) ((((rd) & 1) << 5) | ((rd) & 0xfe)) argument
99 if (((regs->ccr >> (31 - bi)) & 1) != ((bo >> 3) & 1)) in branch_taken()
148 ea = (signed short) (instr & ~3); /* sign-extend */ in dsform_ea()
286 up[0] = byterev_8(up[3]); in do_byte_reverse()
287 up[3] = tmp; in do_byte_reverse()
827 i = IS_LE ? 3 - j : j; in emulate_vsx_load()
831 u32 val = reg->w[IS_LE ? 3 : 0]; in emulate_vsx_load()
833 i = IS_LE ? 3 - j : j; in emulate_vsx_load()
926 i = IS_LE ? 3 - j : j; in emulate_vsx_store()
1091 "1: " op " %2,0,%3\n" \
1096 "3: li %0,%4\n" \
1099 EX_TABLE(1b, 3b) \
1111 "3: li %0,%3\n" \
1114 EX_TABLE(1b, 3b) \
1123 "3: li %0,%3\n" \
1126 EX_TABLE(1b, 3b) \
1136 op->ccval = (regs->ccr & 0x0fffffff) | ((regs->xer >> 3) & 0x10000000); in set_cr0()
1158 struct instruction_op *op, int rd, in add_with_carry() argument
1167 op->reg = rd; in add_with_carry()
1351 unsigned int opcode, ra, rb, rc, rd, spr, u; in analyse_instr() local
1402 rd = 7 - ((word >> 23) & 0x7); in analyse_instr()
1404 rd *= 4; in analyse_instr()
1407 op->ccval = (regs->ccr & ~(0xfUL << rd)) | (val << rd); in analyse_instr()
1442 rd = (word >> 21) & 0x1f; in analyse_instr()
1446 op->ccval = (regs->ccr & ~(1UL << (31 - rd))) | in analyse_instr()
1447 (val << (31 - rd)); in analyse_instr()
1456 switch ((word >> 21) & 3) { in analyse_instr()
1474 rd = (word >> 21) & 0x1f; in analyse_instr()
1487 rd = (suffix >> 21) & 0x1f; in analyse_instr()
1488 op->reg = rd; in analyse_instr()
1489 op->val = regs->gpr[rd]; in analyse_instr()
1505 if (rd & trap_compare(regs->gpr[ra], (short) word)) in analyse_instr()
1509 case 3: /* twi */ in analyse_instr()
1510 if (rd & trap_compare((int)regs->gpr[ra], (short) word)) in analyse_instr()
1526 asm volatile(PPC_MADDHD(%0, %1, %2, %3) : in analyse_instr()
1532 asm volatile(PPC_MADDHDU(%0, %1, %2, %3) : in analyse_instr()
1538 asm volatile(PPC_MADDLD(%0, %1, %2, %3) : in analyse_instr()
1557 add_with_carry(regs, op, rd, ~regs->gpr[ra], imm, 1); in analyse_instr()
1564 if ((rd & 1) == 0) in analyse_instr()
1567 do_cmp_unsigned(regs, op, val, imm, rd >> 2); in analyse_instr()
1574 if ((rd & 1) == 0) in analyse_instr()
1577 do_cmp_signed(regs, op, val, imm, rd >> 2); in analyse_instr()
1582 add_with_carry(regs, op, rd, regs->gpr[ra], imm, 0); in analyse_instr()
1587 add_with_carry(regs, op, rd, regs->gpr[ra], imm, 0); in analyse_instr()
1621 val = DATA32(regs->gpr[rd]); in analyse_instr()
1629 val = DATA32(regs->gpr[rd]); in analyse_instr()
1637 val = DATA32(regs->gpr[rd]); in analyse_instr()
1642 op->val = regs->gpr[rd] | (unsigned short) word; in analyse_instr()
1647 op->val = regs->gpr[rd] | (imm << 16); in analyse_instr()
1651 op->val = regs->gpr[rd] ^ (unsigned short) word; in analyse_instr()
1656 op->val = regs->gpr[rd] ^ (imm << 16); in analyse_instr()
1660 op->val = regs->gpr[rd] & (unsigned short) word; in analyse_instr()
1666 op->val = regs->gpr[rd] & (imm << 16); in analyse_instr()
1673 val = regs->gpr[rd]; in analyse_instr()
1677 switch ((word >> 2) & 3) { in analyse_instr()
1687 case 3: /* rldimi */ in analyse_instr()
1723 if (rd == 0x1f || in analyse_instr()
1724 (rd & trap_compare((int)regs->gpr[ra], in analyse_instr()
1730 if (rd & trap_compare(regs->gpr[ra], regs->gpr[rb])) in analyse_instr()
1738 op->reg = rd; in analyse_instr()
1744 op->reg = rd; in analyse_instr()
1752 op->reg = rd; in analyse_instr()
1777 * 'ra' encodes the CR field number (bfa) in the top 3 bits. in analyse_instr()
1798 val = regs->gpr[rd]; in analyse_instr()
1811 op->reg = rd; in analyse_instr()
1821 op->val = regs->gpr[rd]; in analyse_instr()
1835 if ((rd & 1) == 0) { in analyse_instr()
1841 do_cmp_signed(regs, op, val, val2, rd >> 2); in analyse_instr()
1848 if ((rd & 1) == 0) { in analyse_instr()
1854 do_cmp_unsigned(regs, op, val, val2, rd >> 2); in analyse_instr()
1858 do_cmpb(regs, op, regs->gpr[rd], regs->gpr[rb]); in analyse_instr()
1865 add_with_carry(regs, op, rd, ~regs->gpr[ra], in analyse_instr()
1875 add_with_carry(regs, op, rd, regs->gpr[ra], in analyse_instr()
1903 add_with_carry(regs, op, rd, ~regs->gpr[ra], in analyse_instr()
1908 add_with_carry(regs, op, rd, regs->gpr[ra], in analyse_instr()
1913 add_with_carry(regs, op, rd, ~regs->gpr[ra], 0L, in analyse_instr()
1918 add_with_carry(regs, op, rd, regs->gpr[ra], 0L, in analyse_instr()
1923 add_with_carry(regs, op, rd, ~regs->gpr[ra], -1L, in analyse_instr()
1932 add_with_carry(regs, op, rd, regs->gpr[ra], -1L, in analyse_instr()
2030 val = (unsigned int) regs->gpr[rd]; in analyse_instr()
2035 val = regs->gpr[rd]; in analyse_instr()
2040 op->val = regs->gpr[rd] & regs->gpr[rb]; in analyse_instr()
2044 op->val = regs->gpr[rd] & ~regs->gpr[rb]; in analyse_instr()
2048 do_popcnt(regs, op, regs->gpr[rd], 8); in analyse_instr()
2052 op->val = ~(regs->gpr[rd] | regs->gpr[rb]); in analyse_instr()
2056 do_prty(regs, op, regs->gpr[rd], 32); in analyse_instr()
2060 do_prty(regs, op, regs->gpr[rd], 64); in analyse_instr()
2064 do_bpermd(regs, op, regs->gpr[rd], regs->gpr[rb]); in analyse_instr()
2068 op->val = ~(regs->gpr[rd] ^ regs->gpr[rb]); in analyse_instr()
2072 op->val = regs->gpr[rd] ^ regs->gpr[rb]; in analyse_instr()
2076 do_popcnt(regs, op, regs->gpr[rd], 32); in analyse_instr()
2080 op->val = regs->gpr[rd] | ~regs->gpr[rb]; in analyse_instr()
2084 op->val = regs->gpr[rd] | regs->gpr[rb]; in analyse_instr()
2088 op->val = ~(regs->gpr[rd] & regs->gpr[rb]); in analyse_instr()
2092 do_popcnt(regs, op, regs->gpr[rd], 64); in analyse_instr()
2098 val = (unsigned int) regs->gpr[rd]; in analyse_instr()
2105 val = regs->gpr[rd]; in analyse_instr()
2110 op->val = (signed short) regs->gpr[rd]; in analyse_instr()
2114 op->val = (signed char) regs->gpr[rd]; in analyse_instr()
2118 op->val = (signed int) regs->gpr[rd]; in analyse_instr()
2128 op->val = (regs->gpr[rd] << sh) & 0xffffffffUL; in analyse_instr()
2136 op->val = (regs->gpr[rd] & 0xffffffffUL) >> sh; in analyse_instr()
2144 ival = (signed int) regs->gpr[rd]; in analyse_instr()
2157 ival = (signed int) regs->gpr[rd]; in analyse_instr()
2171 op->val = regs->gpr[rd] << sh; in analyse_instr()
2179 op->val = regs->gpr[rd] >> sh; in analyse_instr()
2187 ival = (signed long int) regs->gpr[rd]; in analyse_instr()
2201 ival = (signed long int) regs->gpr[rd]; in analyse_instr()
2217 val = (signed int) regs->gpr[rd]; in analyse_instr()
2242 op->reg = rd; in analyse_instr()
2248 op->reg = rd; in analyse_instr()
2269 op->reg = rd; in analyse_instr()
2270 op->val = regs->gpr[rd]; in analyse_instr()
2313 if (!((rd & 1) || rd == ra || rd == rb)) in analyse_instr()
2318 if (!(rd & 1)) in analyse_instr()
2492 op->val = byterev_8(regs->gpr[rd]); in analyse_instr()
2502 op->val = byterev_4(regs->gpr[rd]); in analyse_instr()
2518 op->val = byterev_2(regs->gpr[rd]); in analyse_instr()
2523 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2529 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2535 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2543 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2554 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2566 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2575 op->reg = VSX_REGISTER_XTP(rd); in analyse_instr()
2583 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2592 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2603 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2617 op->reg = VSX_REGISTER_XTP(rd); in analyse_instr()
2622 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2629 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2635 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2642 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2648 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2656 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2665 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2674 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2681 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2689 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2696 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2704 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2713 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2722 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2729 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2737 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2790 if (ra >= rd) in analyse_instr()
2792 op->type = MKOP(LOAD_MULTI, 0, 4 * (32 - rd)); in analyse_instr()
2797 op->type = MKOP(STORE_MULTI, 0, 4 * (32 - rd)); in analyse_instr()
2829 if (!((rd & 1) || (rd == ra))) in analyse_instr()
2838 switch (word & 3) { in analyse_instr()
2840 if (rd & 1) in analyse_instr()
2847 op->reg = rd + 32; in analyse_instr()
2852 case 3: /* lxssp */ in analyse_instr()
2855 op->reg = rd + 32; in analyse_instr()
2867 switch (word & 3) { in analyse_instr()
2886 op->reg = VSX_REGISTER_XTP(rd); in analyse_instr()
2911 op->reg = rd + 32; in analyse_instr()
2922 op->reg = rd + 32; in analyse_instr()
2928 case 3: /* stxssp with LSB of DS field = 0 */ in analyse_instr()
2933 op->reg = rd + 32; in analyse_instr()
2944 op->reg = rd + 32; in analyse_instr()
2956 switch (word & 3) { in analyse_instr()
2964 if (!(rd & 1)) in analyse_instr()
2976 rd = (suffix >> 21) & 0x1f; in analyse_instr()
2977 op->reg = rd; in analyse_instr()
2978 op->val = regs->gpr[rd]; in analyse_instr()
2993 op->reg = rd + 32; in analyse_instr()
2999 op->reg = rd + 32; in analyse_instr()
3005 op->reg = rd + 32; in analyse_instr()
3011 op->reg = rd + 32; in analyse_instr()
3025 op->reg = rd + 32; in analyse_instr()
3041 op->reg = VSX_REGISTER_XTP(rd); in analyse_instr()
3054 op->reg = VSX_REGISTER_XTP(rd); in analyse_instr()
3103 case 3: /* Type 11 Modified Register-to-Register */ in analyse_instr()
3113 if (ra == rd) in analyse_instr()
3150 op->reg = rd; in analyse_instr()
3316 int i, rd, nb; in emulate_loadstore() local
3400 ((regs->xer >> 3) & 0x10000000); in emulate_loadstore()
3460 rd = op->reg; in emulate_loadstore()
3472 regs->gpr[rd] = v32; in emulate_loadstore()
3475 rd = (rd + 1) & 0x1f; in emulate_loadstore()
3531 rd = op->reg; in emulate_loadstore()
3533 unsigned int v32 = regs->gpr[rd]; in emulate_loadstore()
3545 rd = (rd + 1) & 0x1f; in emulate_loadstore()