Lines Matching +full:bat +full:- +full:present
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 * Low-level exception handlers and MMU support
14 * This file contains the low-level support and setup for the
28 #include <asm/asm-offsets.h>
33 #include <asm/feature-fixups.h>
39 /* see the comment for clear_bats() -- Cort */ \
64 * -- Cort
76 * pointer (r1) points to just below the end of the half-meg region
77 * from 0x380000 - 0x400000, which is mapped in already.
91 * r5: initrd_end - unused if r4 is 0
97 * -- Cort
114 addis r8,r8,(_stext - 0b)@ha
115 addi r8,r8,(_stext - 0b)@l /* current runtime base addr */
125 * appropriate trampoline if it's present
141 * the necessary low-level setup and clears the BSS
142 * -- Cort <cort@fsmlabs.com>
195 * as we jump to our code at KERNELBASE. -- Cort
223 /* our cpu # was at addr 0 - go */
235 .long -1
249 * a non-zero value, the address of the exception frame to use,
251 * and uses its value if it is non-zero.
254 * -- paulus.
302 bne- 1f
358 /* Floating-point unavailable */
397 * non-altivec kernel running on a machine with altivec just
409 * Note: we get an alternate set of r0 - r3 to use automatically.
416 * r2: ptr to linux-style pte
419 /* Get PTE (linux-style) and check access */
429 bgt- 112f
430 lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */
432 addi r2, r2, (swapper_pg_dir - PAGE_OFFSET)@l /* kernel page table */
437 beq- InstructionAddressInvalid /* return if no mapping */
439 lwz r0,0(r2) /* get linux-style pte */
441 bne- InstructionAddressInvalid /* return if access not permitted */
442 /* Convert linux-style PTE to low word of PPC-style PTE */
443 rlwimi r0,r0,32-2,31,31 /* _PAGE_USER -> PP lsb */
465 rlwimi r2,r2,1,30,30 /* change 1 -> 3 */
482 * r2: ptr to linux-style pte
485 /* Get PTE (linux-style) and check access */
492 bgt- 112f
493 lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */
495 addi r2, r2, (swapper_pg_dir - PAGE_OFFSET)@l /* kernel page table */
499 beq- DataAddressInvalid /* return if no mapping */
501 lwz r0,0(r2) /* get linux-style pte */
503 bne- DataAddressInvalid /* return if access not permitted */
504 /* Convert linux-style PTE to low word of PPC-style PTE */
505 rlwinm r1,r0,32-9,30,30 /* _PAGE_RW -> PP msb */
506 rlwimi r0,r0,32-1,30,30 /* _PAGE_USER -> PP msb */
507 rlwimi r1,r0,32-3,24,24 /* _PAGE_RW -> _PAGE_DIRTY */
508 rlwimi r0,r0,32-1,31,31 /* _PAGE_USER -> PP lsb */
525 rlwimi r2,r0,31-14,14,14
562 * r2: ptr to linux-style pte
565 /* Get PTE (linux-style) and check access */
572 bgt- 112f
573 lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */
575 addi r2, r2, (swapper_pg_dir - PAGE_OFFSET)@l /* kernel page table */
579 beq- DataAddressInvalid /* return if no mapping */
581 lwz r0,0(r2) /* get linux-style pte */
583 bne- DataAddressInvalid /* return if access not permitted */
584 /* Convert linux-style PTE to low word of PPC-style PTE */
585 rlwimi r0,r0,32-2,31,31 /* _PAGE_USER -> PP lsb */
603 rlwimi r2,r0,31-14,14,14
691 rlwinm r3, r3, 32 - 15, _PAGE_RW /* DSISR_STORE -> _PAGE_RW */
767 4: lis r5,_end-KERNELBASE@h
768 ori r5,r5,_end-KERNELBASE@l
779 addi r5,r5,-4
780 addi r6,r6,-4
818 set to map the 0xf0000000 - 0xffffffff region */
829 lis r3,-KERNELBASE@h
832 lis r3,-KERNELBASE@h
843 addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
857 lis r4, (swapper_pg_dir - PAGE_OFFSET)@h
858 ori r4, r4, (swapper_pg_dir - PAGE_OFFSET)@l
887 lis r6, early_hash - PAGE_OFFSET@h
906 /* Load the BAT registers with the values set up by MMU_init. */
935 li r0, 16 - NUM_USER_SEGMENTS /* load up kernel segment registers */
959 lis r4, (swapper_pg_dir - PAGE_OFFSET)@h
960 ori r4, r4, (swapper_pg_dir - PAGE_OFFSET)@l
969 stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
971 * Do early platform-specific initialization,
1025 * be cleared before changing BAT values.
1029 * -- Cort
1113 1: addic. r10, r10, -0x1000
1120 addi r4, r3, __after_mmu_off - _start
1132 /* We use one BAT to map up to 256M of RAM at _PAGE_OFFSET */
1141 ori r11,r11,BL_256M<<2|0x2 /* set up BAT registers for 604 */
1144 mtspr SPRN_DBAT0U,r11 /* bit in upper BAT register */
1153 * setup the display bat prepared for us in prom.c
1184 /* prepare a BAT for early io */