Lines Matching +full:0 +full:xffe08000
37 ranges = <0x0 0x0 0xffe00000 0x00100000>;
44 reg = <0x18>;
47 polarity = <0x00>;
57 reg = <0x2a>;
62 reg = <0x32>;
68 reg = <0x4c>;
77 reg = <0x52>;
82 reg = <0x57>;
88 reg = <0x64>;
94 reg = <0x69>;
100 reg = <0x6f>;
102 interrupts = <14 0>; /* GPIO14 - MFP pin */
134 interrupts = <3 1 0 0>;
135 reg = <0x7>;
141 interrupts = <2 1 0 0>;
142 reg = <0x10>;
146 #size-cells = <0>;
148 port@0 {
149 reg = <0>;
203 fsl,tmr-add = <0xcccccccd>;
204 fsl,tmr-fiper1 = <0x3b9ac9fb>;
205 fsl,tmr-fiper2 = <0x0001869b>;
210 /* Connected to port 0 of QCA8337N-AL3C switch */
241 reg = <0 0xffe05000 0 0x1000>;
243 ranges = <0x0 0x0 0x0 0xef000000 0x01000000>, /* NOR */
244 <0x1 0x0 0x0 0xff800000 0x00040000>, /* NAND */
245 <0x3 0x0 0x0 0xffa00000 0x00020000>; /* CPLD */
248 nor@0,0 {
250 reg = <0x0 0x0 0x01000000>;
259 partition@0 {
261 reg = <0x00000000 0x00020000>;
267 reg = <0x00020000 0x001a0000>;
273 reg = <0x001c0000 0x00180000>;
279 reg = <0x00340000 0x00b00000>;
285 reg = <0x00e40000 0x000c0000>;
289 /* free unused space 0x00f00000-0x00f20000 */
293 reg = <0x00f20000 0x00020000>;
299 reg = <0x00f40000 0x000c0000>;
306 nand@1,0 {
308 reg = <0x1 0x0 0x00040000>;
317 partition@0 {
319 reg = <0x00000000 0x10000000>;
326 cpld@3,0 {
336 reg = <0x3 0x0 0x30>;
339 ranges = <0x0 0x3 0x0 0x00020000>;
346 * memory space at byte offset 0x2. WDI
351 reg = <0x02 0x01>;
357 reg = <0x0d 0x01>;
358 offset = <0x0d>;
359 mask = <0x01>;
360 value = <0x01>;
371 reg = <0x13 0x1d>;
373 #size-cells = <0>;
375 multi-led@0 {
376 reg = <0x0>;
382 reg = <0x1>;
389 reg = <0x2>;
396 reg = <0x3>;
403 reg = <0x4>;
410 reg = <0x5>;
417 reg = <0x6>;
423 reg = <0x7>;
438 * channels. Channel 0 is connected to the front USB 3.0 port,
446 reg = <0 0xffe08000 0 0x1000>;
447 ranges = <0x02000000 0x0 0xc0000000 0 0xc0000000 0x0 0x00200000>, /* MEM */
448 <0x01000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>; /* IO */
450 pcie@0 {
457 reg = <0 0xffe09000 0 0x1000>;
458 ranges = <0x02000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>, /* MEM */
459 <0x01000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>; /* IO */
461 pcie@0 {
473 reg = <0 0xffe0a000 0 0x1000>;
474 ranges = <0x02000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000>, /* MEM */
475 <0x01000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>; /* IO */
477 pcie@0 {