Lines Matching +full:pcie +full:- +full:phy2
1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
36 i-cache-size = <32768>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
49 #address-cells = <2>;
50 #size-cells = <1>;
51 compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus";
54 interrupt-parent = <&ipic>;
62 #address-cells = <1>;
63 #size-cells = <1>;
64 compatible = "cfi-flash";
66 bank-width = <2>;
67 device-width = <1>;
69 u-boot@0 {
71 read-only;
89 compatible = "fsl,mpc837xmds-bcsr";
93 #address-cells = <1>;
94 #size-cells = <1>;
95 compatible = "fsl,mpc8378-fcm-nand",
96 "fsl,elbc-fcm-nand";
99 u-boot@0 {
101 read-only;
115 #address-cells = <1>;
116 #size-cells = <1>;
118 compatible = "simple-bus";
121 bus-frequency = <0>;
128 sleep-nexus {
129 #address-cells = <1>;
130 #size-cells = <1>;
131 compatible = "simple-bus";
136 #address-cells = <1>;
137 #size-cells = <0>;
138 cell-index = <0>;
139 compatible = "fsl-i2c";
142 interrupt-parent = <&ipic>;
149 interrupt-parent = <&ipic>;
154 compatible = "fsl,mpc8378-esdhc", "fsl,esdhc";
157 interrupt-parent = <&ipic>;
158 sdhci,wp-inverted;
159 /* Filled in by U-Boot */
160 clock-frequency = <0>;
165 #address-cells = <1>;
166 #size-cells = <0>;
167 cell-index = <1>;
168 compatible = "fsl-i2c";
171 interrupt-parent = <&ipic>;
176 cell-index = <0>;
180 interrupt-parent = <&ipic>;
185 #address-cells = <1>;
186 #size-cells = <1>;
187 compatible = "fsl,mpc8378-dma", "fsl,elo-dma";
190 interrupt-parent = <&ipic>;
192 cell-index = <0>;
193 dma-channel@0 {
194 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
196 cell-index = <0>;
197 interrupt-parent = <&ipic>;
200 dma-channel@80 {
201 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
203 cell-index = <1>;
204 interrupt-parent = <&ipic>;
207 dma-channel@100 {
208 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
210 cell-index = <2>;
211 interrupt-parent = <&ipic>;
214 dma-channel@180 {
215 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
217 cell-index = <3>;
218 interrupt-parent = <&ipic>;
224 compatible = "fsl-usb2-dr";
226 #address-cells = <1>;
227 #size-cells = <0>;
228 interrupt-parent = <&ipic>;
236 #address-cells = <1>;
237 #size-cells = <1>;
238 cell-index = <0>;
244 local-mac-address = [ 00 00 00 00 00 00 ];
246 phy-connection-type = "mii";
247 interrupt-parent = <&ipic>;
248 tbi-handle = <&tbi0>;
249 phy-handle = <&phy2>;
251 fsl,magic-packet;
254 #address-cells = <1>;
255 #size-cells = <0>;
256 compatible = "fsl,gianfar-mdio";
259 phy2: ethernet-phy@2 { label
260 interrupt-parent = <&ipic>;
265 phy3: ethernet-phy@3 {
266 interrupt-parent = <&ipic>;
271 tbi0: tbi-phy@11 {
273 device_type = "tbi-phy";
279 #address-cells = <1>;
280 #size-cells = <1>;
281 cell-index = <1>;
287 local-mac-address = [ 00 00 00 00 00 00 ];
289 phy-connection-type = "mii";
290 interrupt-parent = <&ipic>;
291 tbi-handle = <&tbi1>;
292 phy-handle = <&phy3>;
294 fsl,magic-packet;
297 #address-cells = <1>;
298 #size-cells = <0>;
299 compatible = "fsl,gianfar-tbi";
302 tbi1: tbi-phy@11 {
304 device_type = "tbi-phy";
310 cell-index = <0>;
314 clock-frequency = <0>;
316 interrupt-parent = <&ipic>;
320 cell-index = <1>;
324 clock-frequency = <0>;
326 interrupt-parent = <&ipic>;
334 interrupt-parent = <&ipic>;
335 fsl,num-channels = <4>;
336 fsl,channel-fifo-len = <24>;
337 fsl,exec-units-mask = <0x9fe>;
338 fsl,descriptor-types-mask = <0x3ab0ebf>;
346 * sense == 2: Edge, high-to-low change
350 interrupt-controller;
351 #address-cells = <0>;
352 #interrupt-cells = <2>;
357 compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc";
360 interrupt-parent = <&ipic>;
365 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
366 interrupt-map = <
409 interrupt-parent = <&ipic>;
411 bus-range = <0x0 0x0>;
415 clock-frequency = <0>;
417 #interrupt-cells = <1>;
418 #size-cells = <2>;
419 #address-cells = <3>;
422 compatible = "fsl,mpc8349-pci";
426 pci1: pcie@e0009000 {
427 #address-cells = <3>;
428 #size-cells = <2>;
429 #interrupt-cells = <1>;
431 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
435 bus-range = <0 255>;
436 interrupt-map-mask = <0xf800 0 0 7>;
437 interrupt-map = <0 0 0 1 &ipic 1 8
442 clock-frequency = <0>;
444 pcie@0 {
445 #address-cells = <3>;
446 #size-cells = <2>;
458 pci2: pcie@e000a000 {
459 #address-cells = <3>;
460 #size-cells = <2>;
461 #interrupt-cells = <1>;
463 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
467 bus-range = <0 255>;
468 interrupt-map-mask = <0xf800 0 0 7>;
469 interrupt-map = <0 0 0 1 &ipic 2 8
474 clock-frequency = <0>;
476 pcie@0 {
477 #address-cells = <3>;
478 #size-cells = <2>;