Lines Matching +full:serial +full:- +full:dir
1 // SPDX-License-Identifier: GPL-2.0-or-later
13 /dts-v1/;
18 #address-cells = <1>;
19 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
36 d-cache-line-size = <32>; // 32 bytes
37 i-cache-line-size = <32>; // 32 bytes
38 d-cache-size = <32768>; // L1, 32K
39 i-cache-size = <32768>; // L1, 32K
40 timebase-frequency = <66000000>;
41 bus-frequency = <264000000>;
42 clock-frequency = <528000000>;
52 #address-cells = <2>;
53 #size-cells = <1>;
54 compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus",
55 "simple-bus";
61 compatible = "cfi-flash";
63 bank-width = <2>;
64 device-width = <1>;
68 #address-cells = <1>;
69 #size-cells = <1>;
70 compatible = "fsl,mpc8360mds-bcsr";
74 bcsr13: gpio-controller@d {
75 #gpio-cells = <2>;
76 compatible = "fsl,mpc8360mds-bcsr-gpio";
78 gpio-controller;
84 #address-cells = <1>;
85 #size-cells = <1>;
87 compatible = "simple-bus";
90 bus-frequency = <264000000>;
99 compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
102 interrupt-parent = <&ipic>;
106 #address-cells = <1>;
107 #size-cells = <0>;
108 cell-index = <0>;
109 compatible = "fsl-i2c";
112 interrupt-parent = <&ipic>;
122 #address-cells = <1>;
123 #size-cells = <0>;
124 cell-index = <1>;
125 compatible = "fsl-i2c";
128 interrupt-parent = <&ipic>;
132 serial0: serial@4500 {
133 cell-index = <0>;
134 device_type = "serial";
137 clock-frequency = <264000000>;
139 interrupt-parent = <&ipic>;
142 serial1: serial@4600 {
143 cell-index = <1>;
144 device_type = "serial";
147 clock-frequency = <264000000>;
149 interrupt-parent = <&ipic>;
153 #address-cells = <1>;
154 #size-cells = <1>;
155 compatible = "fsl,mpc8360-dma", "fsl,elo-dma";
158 interrupt-parent = <&ipic>;
160 cell-index = <0>;
161 dma-channel@0 {
162 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
164 cell-index = <0>;
165 interrupt-parent = <&ipic>;
168 dma-channel@80 {
169 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
171 cell-index = <1>;
172 interrupt-parent = <&ipic>;
175 dma-channel@100 {
176 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
178 cell-index = <2>;
179 interrupt-parent = <&ipic>;
182 dma-channel@180 {
183 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
185 cell-index = <3>;
186 interrupt-parent = <&ipic>;
195 interrupt-parent = <&ipic>;
196 fsl,num-channels = <4>;
197 fsl,channel-fifo-len = <24>;
198 fsl,exec-units-mask = <0x7e>;
199 fsl,descriptor-types-mask = <0x01010ebf>;
204 interrupt-controller;
205 #address-cells = <0>;
206 #interrupt-cells = <2>;
212 #address-cells = <1>;
213 #size-cells = <1>;
217 num-ports = <7>;
219 qe_pio_b: gpio-controller@18 {
220 #gpio-cells = <2>;
221 compatible = "fsl,mpc8360-qe-pario-bank",
222 "fsl,mpc8323-qe-pario-bank";
224 gpio-controller;
228 pio-map = <
229 /* port pin dir open_drain assignment has_irq */
251 2 9 1 0 3 0 /* GTX_CLK - CLK10 */
252 2 8 2 0 1 0>; /* GTX125 - CLK9 */
255 pio-map = <
256 /* port pin dir open_drain assignment has_irq */
278 2 2 1 0 2 0 /* GTX_CLK - CLK10 */
279 2 3 2 0 1 0 /* GTX125 - CLK4 */
288 #address-cells = <1>;
289 #size-cells = <1>;
294 brg-frequency = <0>;
295 bus-frequency = <396000000>;
296 fsl,qe-num-riscs = <2>;
297 fsl,qe-num-snums = <28>;
300 #address-cells = <1>;
301 #size-cells = <1>;
302 compatible = "fsl,qe-muram", "fsl,cpm-muram";
305 data-only@0 {
306 compatible = "fsl,qe-muram-data",
307 "fsl,cpm-muram-data";
313 compatible = "fsl,mpc8360-qe-gtm",
314 "fsl,qe-gtm", "fsl,gtm";
316 clock-frequency = <132000000>;
318 interrupt-parent = <&qeic>;
322 cell-index = <0>;
326 interrupt-parent = <&qeic>;
331 cell-index = <1>;
335 interrupt-parent = <&qeic>;
340 compatible = "fsl,mpc8360-qe-usb",
341 "fsl,mpc8323-qe-usb";
344 interrupt-parent = <&qeic>;
345 fsl,fullspeed-clock = "clk21";
346 fsl,lowspeed-clock = "brg9";
359 cell-index = <1>;
362 interrupt-parent = <&qeic>;
363 local-mac-address = [ 00 00 00 00 00 00 ];
364 rx-clock-name = "none";
365 tx-clock-name = "clk9";
366 phy-handle = <&phy0>;
367 phy-connection-type = "rgmii-id";
368 pio-handle = <&pio1>;
374 cell-index = <2>;
377 interrupt-parent = <&qeic>;
378 local-mac-address = [ 00 00 00 00 00 00 ];
379 rx-clock-name = "none";
380 tx-clock-name = "clk4";
381 phy-handle = <&phy1>;
382 phy-connection-type = "rgmii-id";
383 pio-handle = <&pio2>;
387 #address-cells = <1>;
388 #size-cells = <0>;
390 compatible = "fsl,ucc-mdio";
392 phy0: ethernet-phy@0 {
393 interrupt-parent = <&ipic>;
397 phy1: ethernet-phy@1 {
398 interrupt-parent = <&ipic>;
402 tbi-phy@2 {
403 device_type = "tbi-phy";
408 qeic: interrupt-controller@80 {
409 interrupt-controller;
410 compatible = "fsl,qe-ic";
411 #address-cells = <0>;
412 #interrupt-cells = <1>;
414 big-endian;
416 interrupt-parent = <&ipic>;
421 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
422 interrupt-map = <
465 interrupt-parent = <&ipic>;
467 bus-range = <0 0>;
471 clock-frequency = <66666666>;
472 #interrupt-cells = <1>;
473 #size-cells = <2>;
474 #address-cells = <3>;
477 compatible = "fsl,mpc8349-pci";