Lines Matching +full:0 +full:x8800
27 #size-cells = <0>;
29 PowerPC,8349@0 {
31 reg = <0x0>;
36 timebase-frequency = <0>; // from bootloader
37 bus-frequency = <0>; // from bootloader
38 clock-frequency = <0>; // from bootloader
44 reg = <0x00000000 0x10000000>; // 256MB at 0
49 reg = <0xe2400000 0x8000>;
57 ranges = <0x0 0xe0000000 0x00100000>;
58 reg = <0xe0000000 0x00000200>;
59 bus-frequency = <0>;
64 reg = <0x200 0x100>;
69 #size-cells = <0>;
70 cell-index = <0>;
72 reg = <0x3000 0x100>;
73 interrupts = <14 0x8>;
79 reg = <0x68>;
85 #size-cells = <0>;
88 reg = <0x3100 0x100>;
89 interrupts = <15 0x8>;
95 cell-index = <0>;
97 reg = <0x7000 0x1000>;
98 interrupts = <16 0x8>;
107 reg = <0x82a8 4>;
108 ranges = <0 0x8100 0x1a8>;
111 cell-index = <0>;
112 dma-channel@0 {
114 reg = <0 0x80>;
115 cell-index = <0>;
121 reg = <0x80 0x80>;
128 reg = <0x100 0x80>;
135 reg = <0x180 0x28>;
143 /* port = 0 or 1 */
146 reg = <0x22000 0x1000>;
148 #size-cells = <0>;
150 interrupts = <39 0x8>;
157 reg = <0x23000 0x1000>;
159 #size-cells = <0>;
161 interrupts = <38 0x8>;
169 cell-index = <0>;
173 reg = <0x24000 0x1000>;
174 ranges = <0x0 0x24000 0x1000>;
176 interrupts = <32 0x8 33 0x8 34 0x8>;
180 linux,network-index = <0>;
184 #size-cells = <0>;
186 reg = <0x520 0x20>;
188 phy0: ethernet-phy@0 {
190 interrupts = <17 0x8>;
191 reg = <0x0>;
196 interrupts = <18 0x8>;
197 reg = <0x1>;
201 reg = <0x11>;
214 reg = <0x25000 0x1000>;
215 ranges = <0x0 0x25000 0x1000>;
217 interrupts = <35 0x8 36 0x8 37 0x8>;
225 #size-cells = <0>;
227 reg = <0x520 0x20>;
230 reg = <0x11>;
237 cell-index = <0>;
240 reg = <0x4500 0x100>;
241 clock-frequency = <0>;
242 interrupts = <9 0x8>;
250 reg = <0x4600 0x100>;
251 clock-frequency = <0>;
252 interrupts = <10 0x8>;
257 compatible = "fsl,sec2.0";
258 reg = <0x30000 0x10000>;
259 interrupts = <11 0x8>;
263 fsl,exec-units-mask = <0x7e>;
264 fsl,descriptor-types-mask = <0x01010ebf>;
275 #address-cells = <0>;
277 reg = <0x700 0x100>;
283 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
286 /* IDSEL 0x11 */
287 0x8800 0x0 0x0 0x1 &ipic 20 0x8
288 0x8800 0x0 0x0 0x2 &ipic 21 0x8
289 0x8800 0x0 0x0 0x3 &ipic 22 0x8
290 0x8800 0x0 0x0 0x4 &ipic 23 0x8
292 /* IDSEL 0x12 */
293 0x9000 0x0 0x0 0x1 &ipic 22 0x8
294 0x9000 0x0 0x0 0x2 &ipic 23 0x8
295 0x9000 0x0 0x0 0x3 &ipic 20 0x8
296 0x9000 0x0 0x0 0x4 &ipic 21 0x8
298 /* IDSEL 0x13 */
299 0x9800 0x0 0x0 0x1 &ipic 23 0x8
300 0x9800 0x0 0x0 0x2 &ipic 20 0x8
301 0x9800 0x0 0x0 0x3 &ipic 21 0x8
302 0x9800 0x0 0x0 0x4 &ipic 22 0x8
304 /* IDSEL 0x15 */
305 0xa800 0x0 0x0 0x1 &ipic 20 0x8
306 0xa800 0x0 0x0 0x2 &ipic 21 0x8
307 0xa800 0x0 0x0 0x3 &ipic 22 0x8
308 0xa800 0x0 0x0 0x4 &ipic 23 0x8
310 /* IDSEL 0x16 */
311 0xb000 0x0 0x0 0x1 &ipic 23 0x8
312 0xb000 0x0 0x0 0x2 &ipic 20 0x8
313 0xb000 0x0 0x0 0x3 &ipic 21 0x8
314 0xb000 0x0 0x0 0x4 &ipic 22 0x8
316 /* IDSEL 0x17 */
317 0xb800 0x0 0x0 0x1 &ipic 22 0x8
318 0xb800 0x0 0x0 0x2 &ipic 23 0x8
319 0xb800 0x0 0x0 0x3 &ipic 20 0x8
320 0xb800 0x0 0x0 0x4 &ipic 21 0x8
322 /* IDSEL 0x18 */
323 0xc000 0x0 0x0 0x1 &ipic 21 0x8
324 0xc000 0x0 0x0 0x2 &ipic 22 0x8
325 0xc000 0x0 0x0 0x3 &ipic 23 0x8
326 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
328 interrupts = <66 0x8>;
329 bus-range = <0 0>;
330 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
331 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
332 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
337 reg = <0xe0008500 0x100 /* internal registers */
338 0xe0008300 0x8>; /* config space access registers */
344 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
347 /* IDSEL 0x11 */
348 0x8800 0x0 0x0 0x1 &ipic 20 0x8
349 0x8800 0x0 0x0 0x2 &ipic 21 0x8
350 0x8800 0x0 0x0 0x3 &ipic 22 0x8
351 0x8800 0x0 0x0 0x4 &ipic 23 0x8
353 /* IDSEL 0x12 */
354 0x9000 0x0 0x0 0x1 &ipic 22 0x8
355 0x9000 0x0 0x0 0x2 &ipic 23 0x8
356 0x9000 0x0 0x0 0x3 &ipic 20 0x8
357 0x9000 0x0 0x0 0x4 &ipic 21 0x8
359 /* IDSEL 0x13 */
360 0x9800 0x0 0x0 0x1 &ipic 23 0x8
361 0x9800 0x0 0x0 0x2 &ipic 20 0x8
362 0x9800 0x0 0x0 0x3 &ipic 21 0x8
363 0x9800 0x0 0x0 0x4 &ipic 22 0x8
365 /* IDSEL 0x15 */
366 0xa800 0x0 0x0 0x1 &ipic 20 0x8
367 0xa800 0x0 0x0 0x2 &ipic 21 0x8
368 0xa800 0x0 0x0 0x3 &ipic 22 0x8
369 0xa800 0x0 0x0 0x4 &ipic 23 0x8
371 /* IDSEL 0x16 */
372 0xb000 0x0 0x0 0x1 &ipic 23 0x8
373 0xb000 0x0 0x0 0x2 &ipic 20 0x8
374 0xb000 0x0 0x0 0x3 &ipic 21 0x8
375 0xb000 0x0 0x0 0x4 &ipic 22 0x8
377 /* IDSEL 0x17 */
378 0xb800 0x0 0x0 0x1 &ipic 22 0x8
379 0xb800 0x0 0x0 0x2 &ipic 23 0x8
380 0xb800 0x0 0x0 0x3 &ipic 20 0x8
381 0xb800 0x0 0x0 0x4 &ipic 21 0x8
383 /* IDSEL 0x18 */
384 0xc000 0x0 0x0 0x1 &ipic 21 0x8
385 0xc000 0x0 0x0 0x2 &ipic 22 0x8
386 0xc000 0x0 0x0 0x3 &ipic 23 0x8
387 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
389 interrupts = <67 0x8>;
390 bus-range = <0 0>;
391 ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
392 0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
393 0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;
398 reg = <0xe0008600 0x100 /* internal registers */
399 0xe0008380 0x8>; /* config space access registers */