Lines Matching +full:serial +full:- +full:dir
1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * To enable external serial I/O on a Freescale MPC 8323 SYS/MDS board, do
12 * 2) Solder a wire from U61-21 to P19A-23. P19 is a grid of pins on the board
13 * next to the serial ports.
14 * 3) Solder a wire from U61-22 to P19K-22.
18 * you're going by the schematic, the pin is called "P19J-K22".
21 /dts-v1/;
26 #address-cells = <1>;
27 #size-cells = <1>;
38 #address-cells = <1>;
39 #size-cells = <0>;
44 d-cache-line-size = <32>; // 32 bytes
45 i-cache-line-size = <32>; // 32 bytes
46 d-cache-size = <16384>; // L1, 16K
47 i-cache-size = <16384>; // L1, 16K
48 timebase-frequency = <0>;
49 bus-frequency = <0>;
50 clock-frequency = <0>;
60 compatible = "fsl,mpc8323mds-bcsr";
65 #address-cells = <1>;
66 #size-cells = <1>;
68 compatible = "simple-bus";
71 bus-frequency = <132000000>;
80 compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc";
83 interrupt-parent = <&ipic>;
87 #address-cells = <1>;
88 #size-cells = <0>;
89 cell-index = <0>;
90 compatible = "fsl-i2c";
93 interrupt-parent = <&ipic>;
102 serial0: serial@4500 {
103 cell-index = <0>;
104 device_type = "serial";
107 clock-frequency = <0>;
109 interrupt-parent = <&ipic>;
112 serial1: serial@4600 {
113 cell-index = <1>;
114 device_type = "serial";
117 clock-frequency = <0>;
119 interrupt-parent = <&ipic>;
123 #address-cells = <1>;
124 #size-cells = <1>;
125 compatible = "fsl,mpc8323-dma", "fsl,elo-dma";
128 interrupt-parent = <&ipic>;
130 cell-index = <0>;
131 dma-channel@0 {
132 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
134 cell-index = <0>;
135 interrupt-parent = <&ipic>;
138 dma-channel@80 {
139 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
141 cell-index = <1>;
142 interrupt-parent = <&ipic>;
145 dma-channel@100 {
146 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
148 cell-index = <2>;
149 interrupt-parent = <&ipic>;
152 dma-channel@180 {
153 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
155 cell-index = <3>;
156 interrupt-parent = <&ipic>;
165 interrupt-parent = <&ipic>;
166 fsl,num-channels = <1>;
167 fsl,channel-fifo-len = <24>;
168 fsl,exec-units-mask = <0x4c>;
169 fsl,descriptor-types-mask = <0x0122003f>;
174 interrupt-controller;
175 #address-cells = <0>;
176 #interrupt-cells = <2>;
184 num-ports = <7>;
187 pio-map = <
188 /* port pin dir open_drain assignment has_irq */
209 pio-map = <
210 /* port pin dir open_drain assignment has_irq */
229 pio-map = <
232 * port pin dir drain sel irq
249 #address-cells = <1>;
250 #size-cells = <1>;
255 brg-frequency = <0>;
256 bus-frequency = <198000000>;
257 fsl,qe-num-riscs = <1>;
258 fsl,qe-num-snums = <28>;
261 #address-cells = <1>;
262 #size-cells = <1>;
263 compatible = "fsl,qe-muram", "fsl,cpm-muram";
266 data-only@0 {
267 compatible = "fsl,qe-muram-data",
268 "fsl,cpm-muram-data";
274 cell-index = <0>;
278 interrupt-parent = <&qeic>;
283 cell-index = <1>;
287 interrupt-parent = <&qeic>;
295 interrupt-parent = <&qeic>;
302 cell-index = <3>;
305 interrupt-parent = <&qeic>;
306 local-mac-address = [ 00 00 00 00 00 00 ];
307 rx-clock-name = "clk9";
308 tx-clock-name = "clk10";
309 phy-handle = <&phy3>;
310 pio-handle = <&pio3>;
316 cell-index = <4>;
319 interrupt-parent = <&qeic>;
320 local-mac-address = [ 00 00 00 00 00 00 ];
321 rx-clock-name = "clk7";
322 tx-clock-name = "clk8";
323 phy-handle = <&phy4>;
324 pio-handle = <&pio4>;
328 device_type = "serial";
330 cell-index = <5>; /* The UCC number, 1-7*/
331 port-number = <0>; /* Which ttyQEx device */
332 soft-uart; /* We need Soft-UART */
334 interrupts = <40>; /* From Table 18-12 */
335 interrupt-parent = < &qeic >;
337 * For Soft-UART, we need to set TX to 1X, which
340 rx-clock-name = "brg5";
341 tx-clock-name = "brg6";
342 pio-handle = < &pio5 >;
347 #address-cells = <1>;
348 #size-cells = <0>;
350 compatible = "fsl,ucc-mdio";
352 phy3: ethernet-phy@3 {
353 interrupt-parent = <&ipic>;
357 phy4: ethernet-phy@4 {
358 interrupt-parent = <&ipic>;
364 qeic: interrupt-controller@80 {
365 interrupt-controller;
366 compatible = "fsl,qe-ic";
367 #address-cells = <0>;
368 #interrupt-cells = <1>;
370 big-endian;
372 interrupt-parent = <&ipic>;
377 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
378 interrupt-map = <
420 interrupt-parent = <&ipic>;
422 bus-range = <0x0 0x0>;
426 clock-frequency = <0>;
427 #interrupt-cells = <1>;
428 #size-cells = <2>;
429 #address-cells = <3>;
432 compatible = "fsl,mpc8349-pci";