Lines Matching +full:pcie +full:- +full:phy2
1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /include/ "mpc8641si-pre.dtsi"
27 compatible = "cfi-flash";
29 bank-width = <2>;
30 device-width = <2>;
31 #address-cells = <1>;
32 #size-cells = <1>;
40 read-only;
49 read-only;
58 tbi-handle = <&tbi0>;
59 phy-handle = <&phy0>;
60 phy-connection-type = "rgmii-id";
64 phy0: ethernet-phy@0 {
68 phy1: ethernet-phy@1 {
72 phy2: ethernet-phy@2 { label
76 phy3: ethernet-phy@3 {
80 tbi0: tbi-phy@11 {
82 device_type = "tbi-phy";
87 tbi-handle = <&tbi1>;
88 phy-handle = <&phy1>;
89 phy-connection-type = "rgmii-id";
93 tbi1: tbi-phy@11 {
95 device_type = "tbi-phy";
100 tbi-handle = <&tbi2>;
101 phy-handle = <&phy2>;
102 phy-connection-type = "rgmii-id";
106 tbi2: tbi-phy@11 {
108 device_type = "tbi-phy";
113 tbi-handle = <&tbi3>;
114 phy-handle = <&phy3>;
115 phy-connection-type = "rgmii-id";
119 tbi3: tbi-phy@11 {
121 device_type = "tbi-phy";
126 #address-cells = <1>;
127 #size-cells = <1>;
128 compatible = "fsl,srio-rmu";
132 message-unit@0 {
133 compatible = "fsl,srio-msg-unit";
139 message-unit@100 {
140 compatible = "fsl,srio-msg-unit";
146 doorbell-unit@400 {
147 compatible = "fsl,srio-dbell-unit";
153 port-write-unit@4e0 {
154 compatible = "fsl,srio-port-write-unit";
161 pci0: pcie@ffe08000 {
165 interrupt-map-mask = <0xff00 0 0 7>;
166 interrupt-map = <
167 /* IDSEL 0x11 func 0 - PCI slot 1 */
173 /* IDSEL 0x11 func 1 - PCI slot 1 */
179 /* IDSEL 0x11 func 2 - PCI slot 1 */
185 /* IDSEL 0x11 func 3 - PCI slot 1 */
191 /* IDSEL 0x11 func 4 - PCI slot 1 */
197 /* IDSEL 0x11 func 5 - PCI slot 1 */
203 /* IDSEL 0x11 func 6 - PCI slot 1 */
209 /* IDSEL 0x11 func 7 - PCI slot 1 */
215 /* IDSEL 0x12 func 0 - PCI slot 2 */
221 /* IDSEL 0x12 func 1 - PCI slot 2 */
227 /* IDSEL 0x12 func 2 - PCI slot 2 */
233 /* IDSEL 0x12 func 3 - PCI slot 2 */
239 /* IDSEL 0x12 func 4 - PCI slot 2 */
245 /* IDSEL 0x12 func 5 - PCI slot 2 */
251 /* IDSEL 0x12 func 6 - PCI slot 2 */
257 /* IDSEL 0x12 func 7 - PCI slot 2 */
281 pcie@0 {
291 #size-cells = <2>;
292 #address-cells = <3>;
301 #size-cells = <1>;
302 #address-cells = <2>;
306 interrupt-parent = <&i8259>;
308 i8259: interrupt-controller@20 {
312 interrupt-controller;
313 device_type = "interrupt-controller";
314 #address-cells = <0>;
315 #interrupt-cells = <2>;
321 #size-cells = <0>;
322 #address-cells = <1>;
325 interrupt-parent = <&i8259>;
353 pci1: pcie@ffe09000 {
358 pcie@0 {
378 #address-cells = <2>;
379 #size-cells = <2>;
380 fsl,srio-rmu-handle = <&rmu>;
384 #address-cells = <2>;
385 #size-cells = <2>;
386 cell-index = <1>;
394 /include/ "mpc8641si-post.dtsi"