Lines Matching +full:4 +full:mb
22 #define REG_SZ 4
62 #define LDREGM ldd,mb
316 fldd,mb -8(\regs), %fr30
317 fldd,mb -8(\regs), %fr29
318 fldd,mb -8(\regs), %fr28
319 fldd,mb -8(\regs), %fr27
320 fldd,mb -8(\regs), %fr26
321 fldd,mb -8(\regs), %fr25
322 fldd,mb -8(\regs), %fr24
323 fldd,mb -8(\regs), %fr23
324 fldd,mb -8(\regs), %fr22
325 fldd,mb -8(\regs), %fr21
326 fldd,mb -8(\regs), %fr20
327 fldd,mb -8(\regs), %fr19
328 fldd,mb -8(\regs), %fr18
329 fldd,mb -8(\regs), %fr17
330 fldd,mb -8(\regs), %fr16
331 fldd,mb -8(\regs), %fr15
332 fldd,mb -8(\regs), %fr14
333 fldd,mb -8(\regs), %fr13
334 fldd,mb -8(\regs), %fr12
335 fldd,mb -8(\regs), %fr11
336 fldd,mb -8(\regs), %fr10
337 fldd,mb -8(\regs), %fr9
338 fldd,mb -8(\regs), %fr8
339 fldd,mb -8(\regs), %fr7
340 fldd,mb -8(\regs), %fr6
341 fldd,mb -8(\regs), %fr5
342 fldd,mb -8(\regs), %fr4
343 fldd,mb -8(\regs), %fr3
344 fldd,mb -8(\regs), %fr2
345 fldd,mb -8(\regs), %fr1
346 fldd,mb -8(\regs), %fr0
363 fldd,mb -8(%r30), %fr21
364 fldd,mb -8(%r30), %fr20
365 fldd,mb -8(%r30), %fr19
366 fldd,mb -8(%r30), %fr18
367 fldd,mb -8(%r30), %fr17
368 fldd,mb -8(%r30), %fr16
369 fldd,mb -8(%r30), %fr15
370 fldd,mb -8(%r30), %fr14
371 fldd,mb -8(%r30), %fr13
372 fldd,mb -8(%r30), %fr12
415 ldd,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
459 ldw,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
526 * See PA 2.0 Arch. page F-4 and F-5.
536 * PA 2.0 processor will single step all insn in the same QUAD (4 insn).
543 nop /* 4 */
563 load32 4f, %r1
565 ldo 4(%r1), %r1
569 4: