15 #include <asm/asm-offsets.h>
59 #define ADDC(sum,reg)						\  argument
62 	ADD	sum, reg;					\
63 	sltu	v1, sum, reg;					\
67 #define ADDC32(sum,reg)						\  argument
70 	addu	sum, reg;					\
71 	sltu	v1, sum, reg;					\
342  * reg     : Register
343  * addr    : Address
346 #define EXC(insn, type, reg, addr)		\  argument
348 9:		insn reg, addr;			\
357 9:			__BUILD_EVA_INSN(insn##e, reg, addr);	\
363 			insn reg, addr;				\
372 #define LOAD(reg, addr)		EXC(ld, LD_INSN, reg, addr)  argument
373 #define LOADBU(reg, addr)	EXC(lbu, LD_INSN, reg, addr)  argument
374 #define LOADL(reg, addr)	EXC(ldl, LD_INSN, reg, addr)  argument
375 #define LOADR(reg, addr)	EXC(ldr, LD_INSN, reg, addr)  argument
376 #define STOREB(reg, addr)	EXC(sb, ST_INSN, reg, addr)  argument
377 #define STOREL(reg, addr)	EXC(sdl, ST_INSN, reg, addr)  argument
378 #define STORER(reg, addr)	EXC(sdr, ST_INSN, reg, addr)  argument
379 #define STORE(reg, addr)	EXC(sd, ST_INSN, reg, addr)  argument
392 #define LOAD(reg, addr)		EXC(lw, LD_INSN, reg, addr)  argument
393 #define LOADBU(reg, addr)	EXC(lbu, LD_INSN, reg, addr)  argument
394 #define LOADL(reg, addr)	EXC(lwl, LD_INSN, reg, addr)  argument
395 #define LOADR(reg, addr)	EXC(lwr, LD_INSN, reg, addr)  argument
396 #define STOREB(reg, addr)	EXC(sb, ST_INSN, reg, addr)  argument
397 #define STOREL(reg, addr)	EXC(swl, ST_INSN, reg, addr)  argument
398 #define STORER(reg, addr)	EXC(swr, ST_INSN, reg, addr)  argument
399 #define STORE(reg, addr)	EXC(sw, ST_INSN, reg, addr)  argument
428 #define REST(unit)  (FIRST(unit)+NBYTES-1)
430 #define ADDRMASK (NBYTES-1)
440 	li	sum, -1
462 	 * use delay slot for fall-through
512 	 and	rem, len, (NBYTES-1)	# rem = len % NBYTES
555 	 * because can't assume read-access to dst.  Instead, use
559 	 * wide-issue mips processors because the code has fewer branches and
560 	 * more instruction-level parallelism.
570 	STREST(t0, -1(t1))
606 	 and	rem, len, (4*NBYTES-1)	 # rem = len % 4*NBYTES
642 	 and	rem, len, NBYTES-1  # rem = len % NBYTES
666 #define SHIFT_START 8*(NBYTES-1)
667 #define SHIFT_INC -8
688 	LOADBU(t0, NBYTES-2(src))
690 	STOREB(t0, NBYTES-2(dst))