Lines Matching +full:interrupt +full:- +full:counter
8 * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
30 #define PI_IO_PROTECT 0x000010 /* Interrupt Pending Protection */
65 #define PI_NMI_OFFSET (PI_NMI_B - PI_NMI_A)
68 /* Regular Interrupt register checking. */
73 #define PI_INT_MASK0_A 0x0000a8 /* Interrupt Mask 0 for CPU A */
74 #define PI_INT_MASK1_A 0x0000b0 /* Interrupt Mask 1 for CPU A */
75 #define PI_INT_MASK0_B 0x0000b8 /* Interrupt Mask 0 for CPU B */
76 #define PI_INT_MASK1_B 0x0000c0 /* Interrupt Mask 1 for CPU B */
82 #define PI_CC_PEND_SET_A 0x0000c8 /* CC Interrupt Pending Set, CPU A */
83 #define PI_CC_PEND_SET_B 0x0000d0 /* CC Interrupt Pending Set, CPU B */
84 #define PI_CC_PEND_CLR_A 0x0000d8 /* CC Interrupt Pending Clr, CPU A */
85 #define PI_CC_PEND_CLR_B 0x0000e0 /* CC Interrupt Pending Clr, CPU B */
86 #define PI_CC_MASK 0x0000e8 /* CC Interrupt mask */
90 /* Realtime Counter and Profiler control registers */
92 #define PI_RT_COUNT 0x030100 /* Real Time Counter */
109 /* Built-In Self Test support */
122 #define PI_GFX_CREDIT_CNTR_A 0x000308 /* Graphics credit counter A */
124 #define PI_GFX_INT_CNTR_A 0x000318 /* Graphics interrupt counter A */
125 #define PI_GFX_INT_CMP_A 0x000320 /* Graphics interrupt comparator A */
127 #define PI_GFX_CREDIT_CNTR_B 0x000330 /* Graphics credit counter B */
129 #define PI_GFX_INT_CNTR_B 0x000340 /* Graphics interrupt counter B */
130 #define PI_GFX_INT_CMP_B 0x000348 /* Graphics interrupt comparator B */
132 #define PI_GFX_OFFSET (PI_GFX_PAGE_B - PI_GFX_PAGE_A)
136 #define PI_ERR_INT_PEND 0x000400 /* Error Interrupt Pending */
137 #define PI_ERR_INT_MASK_A 0x000408 /* Error Interrupt mask for CPU A */
138 #define PI_ERR_INT_MASK_B 0x000410 /* Error Interrupt mask for CPU B */
157 #define PI_NACK_CNT_A 0x0004a8 /* Consecutive NACK counter */
160 #define PI_STACKADDR_OFFSET (PI_ERR_STACK_ADDR_B - PI_ERR_STACK_ADDR_A)
161 #define PI_ERRSTAT_OFFSET (PI_ERR_STATUS0_B - PI_ERR_STATUS0_A)
162 #define PI_RDCLR_OFFSET (PI_ERR_STATUS0_A_RCLR - PI_ERR_STATUS0_A)
307 ((_sz) ? (PI_MIN_STACK_SIZE << ((_sz) - 1)) : 0)
350 s1_inval_cnt:10, /* signed invalidate counter RRB */
351 s1_to_cnt : 8, /* crb timeout counter */
374 /* Interrupt pending bits on R10000 */