30 #define GIC_ACCESSOR_RO(sz, off, name)					\  argument
31 	CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_SHARED_OFS + off, name)
34 #define GIC_ACCESSOR_RW(sz, off, name)					\  argument
35 	CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_SHARED_OFS + off, name)
38 #define GIC_VX_ACCESSOR_RO(sz, off, name)				\  argument
39 	CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_LOCAL_OFS + off, vl_##name)	\
40 	CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_REDIR_OFS + off, vo_##name)
43 #define GIC_VX_ACCESSOR_RW(sz, off, name)				\  argument
44 	CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_LOCAL_OFS + off, vl_##name)	\
45 	CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_REDIR_OFS + off, vo_##name)
48 #define GIC_ACCESSOR_RO_INTR_REG(sz, off, stride, name)			\  argument
51 	return mips_gic_base + (off) + (intr * (stride));		\
61 #define GIC_ACCESSOR_RW_INTR_REG(sz, off, stride, name)			\  argument
62 	GIC_ACCESSOR_RO_INTR_REG(sz, off, stride, name)			\
72 #define GIC_VX_ACCESSOR_RO_INTR_REG(sz, off, stride, name)		\  argument
73 	GIC_ACCESSOR_RO_INTR_REG(sz, MIPS_GIC_LOCAL_OFS + off,		\
75 	GIC_ACCESSOR_RO_INTR_REG(sz, MIPS_GIC_REDIR_OFS + off,		\
79 #define GIC_VX_ACCESSOR_RW_INTR_REG(sz, off, stride, name)		\  argument
80 	GIC_ACCESSOR_RW_INTR_REG(sz, MIPS_GIC_LOCAL_OFS + off,		\
82 	GIC_ACCESSOR_RW_INTR_REG(sz, MIPS_GIC_REDIR_OFS + off,		\
86 #define GIC_ACCESSOR_RO_INTR_BIT(off, name)				\  argument
89 	return mips_gic_base + (off);					\
109 #define GIC_ACCESSOR_RW_INTR_BIT(off, name)				\  argument
110 	GIC_ACCESSOR_RO_INTR_BIT(off, name)				\
150 #define GIC_VX_ACCESSOR_RO_INTR_BIT(sz, off, name)			\  argument
151 	GIC_ACCESSOR_RO_INTR_BIT(sz, MIPS_GIC_LOCAL_OFS + off,		\
153 	GIC_ACCESSOR_RO_INTR_BIT(sz, MIPS_GIC_REDIR_OFS + off,		\
157 #define GIC_VX_ACCESSOR_RW_INTR_BIT(sz, off, name)			\  argument
158 	GIC_ACCESSOR_RW_INTR_BIT(sz, MIPS_GIC_LOCAL_OFS + off,		\
160 	GIC_ACCESSOR_RW_INTR_BIT(sz, MIPS_GIC_REDIR_OFS + off,		\