Lines Matching +full:32 +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 # error Please include asm/mips-cps.h rather than asm/mips-gic.h
29 /* For read-only shared registers */
33 /* For read-write shared registers */
37 /* For read-only local registers */
42 /* For read-write local registers */
47 /* For read-only shared per-interrupt registers */
56 BUILD_BUG_ON(sz != 32); \
60 /* For read-write shared per-interrupt registers */
67 BUILD_BUG_ON(sz != 32); \
71 /* For read-only local per-interrupt registers */
78 /* For read-write local per-interrupt registers */
85 /* For read-only shared bit-per-interrupt registers */
101 addr += (intr / 32) * sizeof(uint32_t); \
102 val = __raw_readl(addr) >> intr % 32; \
108 /* For read-write shared bit-per-interrupt registers */
118 __raw_writeq(BIT(intr % 64), addr); \
120 addr += (intr / 32) * sizeof(uint32_t); \
121 __raw_writel(BIT(intr % 32), addr); \
141 addr += (intr / 32) * sizeof(uint32_t); \
143 _val &= ~BIT(intr % 32); \
144 _val |= val << (intr % 32); \
149 /* For read-only local bit-per-interrupt registers */
156 /* For read-write local bit-per-interrupt registers */
163 /* GIC_SH_CONFIG - Information about the GIC configuration */
164 GIC_ACCESSOR_RW(32, 0x000, config)
165 #define GIC_CONFIG_COUNTSTOP BIT(28)
170 /* GIC_SH_COUNTER - Shared global counter value */
172 GIC_ACCESSOR_RW(32, 0x010, counter_32l)
173 GIC_ACCESSOR_RW(32, 0x014, counter_32h)
175 /* GIC_SH_POL_* - Configures interrupt polarity */
179 #define GIC_POL_FALLING_EDGE 0 /* when single-edge triggered */
180 #define GIC_POL_RISING_EDGE 1 /* when single-edge triggered */
182 /* GIC_SH_TRIG_* - Configures interrupts to be edge or level triggered */
187 /* GIC_SH_DUAL_* - Configures whether interrupts trigger on both edges */
189 #define GIC_DUAL_SINGLE 0 /* when edge-triggered */
190 #define GIC_DUAL_DUAL 1 /* when edge-triggered */
192 /* GIC_SH_WEDGE - Write an 'edge', ie. trigger an interrupt */
193 GIC_ACCESSOR_RW(32, 0x280, wedge)
194 #define GIC_WEDGE_RW BIT(31)
197 /* GIC_SH_RMASK_* - Reset/clear shared interrupt mask bits */
200 /* GIC_SH_SMASK_* - Set shared interrupt mask bits */
203 /* GIC_SH_MASK_* - Read the current shared interrupt mask */
206 /* GIC_SH_PEND_* - Read currently pending shared interrupts */
209 /* GIC_SH_MAPx_PIN - Map shared interrupts to a particular CPU pin */
210 GIC_ACCESSOR_RW_INTR_REG(32, 0x500, 0x4, map_pin)
211 #define GIC_MAP_PIN_MAP_TO_PIN BIT(31)
212 #define GIC_MAP_PIN_MAP_TO_NMI BIT(30)
215 /* GIC_SH_MAPx_VP - Map shared interrupts to a particular Virtual Processor */
216 GIC_ACCESSOR_RW_INTR_REG(32, 0x2000, 0x20, map_vp)
218 /* GIC_Vx_CTL - VP-level interrupt control */
219 GIC_VX_ACCESSOR_RW(32, 0x000, ctl)
220 #define GIC_VX_CTL_FDC_ROUTABLE BIT(4)
221 #define GIC_VX_CTL_SWINT_ROUTABLE BIT(3)
222 #define GIC_VX_CTL_PERFCNT_ROUTABLE BIT(2)
223 #define GIC_VX_CTL_TIMER_ROUTABLE BIT(1)
224 #define GIC_VX_CTL_EIC BIT(0)
226 /* GIC_Vx_PEND - Read currently pending local interrupts */
227 GIC_VX_ACCESSOR_RO(32, 0x004, pend)
229 /* GIC_Vx_MASK - Read the current local interrupt mask */
230 GIC_VX_ACCESSOR_RO(32, 0x008, mask)
232 /* GIC_Vx_RMASK - Reset/clear local interrupt mask bits */
233 GIC_VX_ACCESSOR_RW(32, 0x00c, rmask)
235 /* GIC_Vx_SMASK - Set local interrupt mask bits */
236 GIC_VX_ACCESSOR_RW(32, 0x010, smask)
238 /* GIC_Vx_*_MAP - Route local interrupts to the desired pins */
239 GIC_VX_ACCESSOR_RW_INTR_REG(32, 0x040, 0x4, map)
241 /* GIC_Vx_WD_MAP - Route the local watchdog timer interrupt */
242 GIC_VX_ACCESSOR_RW(32, 0x040, wd_map)
244 /* GIC_Vx_COMPARE_MAP - Route the local count/compare interrupt */
245 GIC_VX_ACCESSOR_RW(32, 0x044, compare_map)
247 /* GIC_Vx_TIMER_MAP - Route the local CPU timer (cp0 count/compare) interrupt */
248 GIC_VX_ACCESSOR_RW(32, 0x048, timer_map)
250 /* GIC_Vx_FDC_MAP - Route the local fast debug channel interrupt */
251 GIC_VX_ACCESSOR_RW(32, 0x04c, fdc_map)
253 /* GIC_Vx_PERFCTR_MAP - Route the local performance counter interrupt */
254 GIC_VX_ACCESSOR_RW(32, 0x050, perfctr_map)
256 /* GIC_Vx_SWINT0_MAP - Route the local software interrupt 0 */
257 GIC_VX_ACCESSOR_RW(32, 0x054, swint0_map)
259 /* GIC_Vx_SWINT1_MAP - Route the local software interrupt 1 */
260 GIC_VX_ACCESSOR_RW(32, 0x058, swint1_map)
262 /* GIC_Vx_OTHER - Configure access to other Virtual Processor registers */
263 GIC_VX_ACCESSOR_RW(32, 0x080, other)
266 /* GIC_Vx_IDENT - Retrieve the local Virtual Processor's ID */
267 GIC_VX_ACCESSOR_RO(32, 0x088, ident)
270 /* GIC_Vx_COMPARE - Value to compare with GIC_SH_COUNTER */
273 /* GIC_Vx_EIC_SHADOW_SET_BASE - Set shadow register set for each interrupt */
274 GIC_VX_ACCESSOR_RW_INTR_REG(32, 0x100, 0x4, eic_shadow_set)
277 * enum mips_gic_local_interrupt - GIC local interrupts
301 * mips_gic_present() - Determine whether a GIC is present
314 * mips_gic_vx_map_reg() - Return GIC_Vx_<intr>_MAP register offset
344 * gic_get_c0_compare_int() - Return cp0 count/compare interrupt virq
354 * gic_get_c0_perfcount_int() - Return performance counter interrupt virq
364 * gic_get_c0_fdc_int() - Return fast debug channel interrupt virq