Lines Matching refs:sysc
62 sysc: syscon@0 { label
63 compatible = "mediatek,mt7621-sysc", "syscon";
94 clocks = <&sysc MT7621_CLK_I2C>;
96 resets = <&sysc MT7621_RST_I2C>;
117 clocks = <&sysc MT7621_CLK_UART1>;
133 clocks = <&sysc MT7621_CLK_SPI>;
136 resets = <&sysc MT7621_RST_SPI>;
251 clocks = <&sysc MT7621_CLK_SHXC>,
252 <&sysc MT7621_CLK_50M>;
265 clocks = <&sysc MT7621_CLK_XTAL>;
284 clocks = <&sysc MT7621_CLK_CPU>;
302 clocks = <&sysc MT7621_CLK_FE>,
303 <&sysc MT7621_CLK_ETH>;
309 resets = <&sysc MT7621_RST_FE &sysc MT7621_RST_ETH>;
315 mediatek,ethsys = <&sysc>;
347 resets = <&sysc MT7621_RST_MCM>;
439 resets = <&sysc MT7621_RST_PCIE0>;
440 clocks = <&sysc MT7621_CLK_PCIE0>;
454 resets = <&sysc MT7621_RST_PCIE1>;
455 clocks = <&sysc MT7621_CLK_PCIE1>;
469 resets = <&sysc MT7621_RST_PCIE2>;
470 clocks = <&sysc MT7621_CLK_PCIE2>;
480 clocks = <&sysc MT7621_CLK_XTAL>;
487 clocks = <&sysc MT7621_CLK_XTAL>;