Lines Matching +full:0 +full:x4800
8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9 0 0x20000000 0 0x20000000 0 0x10000000
10 0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
11 0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
15 reg = <0 0x10000000 0 0x400>;
18 loongson,pic-base-vec = <0>;
24 reg = <0 0x10080000 0 0x100>;
34 reg = <0 0x10080100 0 0x100>;
44 reg = <0 0x10080200 0 0x100>;
54 reg = <0 0x10080300 0 0x100>;
69 reg = <0 0x1a000000 0 0x02000000>,
70 <0xefe 0x00000000 0 0x20000000>;
72 ranges = <0x01000000 0x0 0x00020000 0x0 0x18020000 0x0 0x00020000>,
73 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
75 ohci@4,0 {
76 compatible = "pci0014,7a24.0",
81 reg = <0x2000 0x0 0x0 0x0 0x0>;
87 compatible = "pci0014,7a14.0",
92 reg = <0x2100 0x0 0x0 0x0 0x0>;
97 ohci@5,0 {
98 compatible = "pci0014,7a24.0",
103 reg = <0x2800 0x0 0x0 0x0 0x0>;
109 compatible = "pci0014,7a14.0",
114 reg = <0x2900 0x0 0x0 0x0 0x0>;
119 sata@8,0 {
120 compatible = "pci0014,7a08.0",
125 reg = <0x4000 0x0 0x0 0x0 0x0>;
131 compatible = "pci0014,7a08.0",
136 reg = <0x4100 0x0 0x0 0x0 0x0>;
142 compatible = "pci0014,7a08.0",
147 reg = <0x4200 0x0 0x0 0x0 0x0>;
152 gpu@6,0 {
153 compatible = "pci0014,7a15.0",
158 reg = <0x3000 0x0 0x0 0x0 0x0>;
164 compatible = "pci0014,7a06.0",
169 reg = <0x3100 0x0 0x0 0x0 0x0>;
174 hda@7,0 {
175 compatible = "pci0014,7a07.0",
180 reg = <0x3800 0x0 0x0 0x0 0x0>;
185 gmac@3,0 {
186 compatible = "pci0014,7a03.0",
192 reg = <0x1800 0x0 0x0 0x0 0x0>;
200 #size-cells = <0>;
202 phy0: ethernet-phy@0 {
203 reg = <0>;
209 compatible = "pci0014,7a03.0",
215 reg = <0x1900 0x0 0x0 0x0 0x0>;
223 #size-cells = <0>;
226 reg = <0>;
231 pci_bridge@9,0 {
237 reg = <0x4800 0x0 0x0 0x0 0x0>;
242 interrupt-map-mask = <0 0 0 0>;
243 interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
246 pci_bridge@a,0 {
252 reg = <0x5000 0x0 0x0 0x0 0x0>;
257 interrupt-map-mask = <0 0 0 0>;
258 interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
261 pci_bridge@b,0 {
267 reg = <0x5800 0x0 0x0 0x0 0x0>;
272 interrupt-map-mask = <0 0 0 0>;
273 interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
276 pci_bridge@c,0 {
282 reg = <0x6000 0x0 0x0 0x0 0x0>;
287 interrupt-map-mask = <0 0 0 0>;
288 interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
291 pci_bridge@d,0 {
297 reg = <0x6800 0x0 0x0 0x0 0x0>;
302 interrupt-map-mask = <0 0 0 0>;
303 interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
306 pci_bridge@e,0 {
312 reg = <0x7000 0x0 0x0 0x0 0x0>;
317 interrupt-map-mask = <0 0 0 0>;
318 interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
321 pci_bridge@f,0 {
327 reg = <0x7800 0x0 0x0 0x0 0x0>;
332 interrupt-map-mask = <0 0 0 0>;
333 interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
336 pci_bridge@10,0 {
342 reg = <0x8000 0x0 0x0 0x0 0x0>;
347 interrupt-map-mask = <0 0 0 0>;
348 interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;
351 pci_bridge@11,0 {
357 reg = <0x8800 0x0 0x0 0x0 0x0>;
362 interrupt-map-mask = <0 0 0 0>;
363 interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;
366 pci_bridge@12,0 {
372 reg = <0x9000 0x0 0x0 0x0 0x0>;
377 interrupt-map-mask = <0 0 0 0>;
378 interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;
381 pci_bridge@13,0 {
387 reg = <0x9800 0x0 0x0 0x0 0x0>;
392 interrupt-map-mask = <0 0 0 0>;
393 interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;
396 pci_bridge@14,0 {
402 reg = <0xa000 0x0 0x0 0x0 0x0>;
407 interrupt-map-mask = <0 0 0 0>;
408 interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;
416 ranges = <1 0 0 0x18000000 0x20000>;