Lines Matching +full:0 +full:- +full:7
1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "simple-bus";
6 #address-cells = <2>;
7 #size-cells = <2>;
8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9 0 0x20000000 0 0x20000000 0 0x10000000
10 0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
11 0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
13 pic: interrupt-controller@10000000 {
14 compatible = "loongson,pch-pic-1.0";
15 reg = <0 0x10000000 0 0x400>;
16 interrupt-controller;
17 interrupt-parent = <&htvec>;
18 loongson,pic-base-vec = <0>;
19 #interrupt-cells = <2>;
24 reg = <0 0x10080000 0 0x100>;
25 clock-frequency = <50000000>;
26 interrupt-parent = <&pic>;
28 no-loopback-test;
34 reg = <0 0x10080100 0 0x100>;
35 clock-frequency = <50000000>;
36 interrupt-parent = <&pic>;
38 no-loopback-test;
44 reg = <0 0x10080200 0 0x100>;
45 clock-frequency = <50000000>;
46 interrupt-parent = <&pic>;
48 no-loopback-test;
54 reg = <0 0x10080300 0 0x100>;
55 clock-frequency = <50000000>;
56 interrupt-parent = <&pic>;
58 no-loopback-test;
62 compatible = "loongson,ls7a-pci";
64 #address-cells = <3>;
65 #size-cells = <2>;
66 #interrupt-cells = <2>;
67 msi-parent = <&msi>;
69 reg = <0 0x1a000000 0 0x02000000>,
70 <0xefe 0x00000000 0 0x20000000>;
72 ranges = <0x01000000 0x0 0x00020000 0x0 0x18020000 0x0 0x00020000>,
73 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
75 ohci@4,0 {
76 compatible = "pci0014,7a24.0",
77 "pci0014,7a24",
81 reg = <0x2000 0x0 0x0 0x0 0x0>;
83 interrupt-parent = <&pic>;
87 compatible = "pci0014,7a14.0",
88 "pci0014,7a14",
92 reg = <0x2100 0x0 0x0 0x0 0x0>;
94 interrupt-parent = <&pic>;
97 ohci@5,0 {
98 compatible = "pci0014,7a24.0",
99 "pci0014,7a24",
103 reg = <0x2800 0x0 0x0 0x0 0x0>;
105 interrupt-parent = <&pic>;
109 compatible = "pci0014,7a14.0",
110 "pci0014,7a14",
114 reg = <0x2900 0x0 0x0 0x0 0x0>;
116 interrupt-parent = <&pic>;
119 sata@8,0 {
120 compatible = "pci0014,7a08.0",
121 "pci0014,7a08",
125 reg = <0x4000 0x0 0x0 0x0 0x0>;
127 interrupt-parent = <&pic>;
131 compatible = "pci0014,7a08.0",
132 "pci0014,7a08",
136 reg = <0x4100 0x0 0x0 0x0 0x0>;
138 interrupt-parent = <&pic>;
142 compatible = "pci0014,7a08.0",
143 "pci0014,7a08",
147 reg = <0x4200 0x0 0x0 0x0 0x0>;
149 interrupt-parent = <&pic>;
152 gpu@6,0 {
153 compatible = "pci0014,7a15.0",
154 "pci0014,7a15",
158 reg = <0x3000 0x0 0x0 0x0 0x0>;
160 interrupt-parent = <&pic>;
164 compatible = "pci0014,7a06.0",
165 "pci0014,7a06",
169 reg = <0x3100 0x0 0x0 0x0 0x0>;
171 interrupt-parent = <&pic>;
174 hda@7,0 {
175 compatible = "pci0014,7a07.0",
176 "pci0014,7a07",
180 reg = <0x3800 0x0 0x0 0x0 0x0>;
182 interrupt-parent = <&pic>;
185 gmac@3,0 {
186 compatible = "pci0014,7a03.0",
187 "pci0014,7a03",
190 "loongson, pci-gmac";
192 reg = <0x1800 0x0 0x0 0x0 0x0>;
195 interrupt-names = "macirq", "eth_lpi";
196 interrupt-parent = <&pic>;
197 phy-mode = "rgmii";
199 #address-cells = <1>;
200 #size-cells = <0>;
201 compatible = "snps,dwmac-mdio";
202 phy0: ethernet-phy@0 {
203 reg = <0>;
209 compatible = "pci0014,7a03.0",
210 "pci0014,7a03",
213 "loongson, pci-gmac";
215 reg = <0x1900 0x0 0x0 0x0 0x0>;
218 interrupt-names = "macirq", "eth_lpi";
219 interrupt-parent = <&pic>;
220 phy-mode = "rgmii";
222 #address-cells = <1>;
223 #size-cells = <0>;
224 compatible = "snps,dwmac-mdio";
225 phy1: ethernet-phy@1 {
226 reg = <0>;
231 pci_bridge@9,0 {
232 compatible = "pci0014,7a19.1",
233 "pci0014,7a19",
237 reg = <0x4800 0x0 0x0 0x0 0x0>;
239 interrupt-parent = <&pic>;
241 #interrupt-cells = <1>;
242 interrupt-map-mask = <0 0 0 0>;
243 interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
246 pci_bridge@a,0 {
247 compatible = "pci0014,7a09.1",
248 "pci0014,7a09",
252 reg = <0x5000 0x0 0x0 0x0 0x0>;
254 interrupt-parent = <&pic>;
256 #interrupt-cells = <1>;
257 interrupt-map-mask = <0 0 0 0>;
258 interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
261 pci_bridge@b,0 {
262 compatible = "pci0014,7a09.1",
263 "pci0014,7a09",
267 reg = <0x5800 0x0 0x0 0x0 0x0>;
269 interrupt-parent = <&pic>;
271 #interrupt-cells = <1>;
272 interrupt-map-mask = <0 0 0 0>;
273 interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
276 pci_bridge@c,0 {
277 compatible = "pci0014,7a09.1",
278 "pci0014,7a09",
282 reg = <0x6000 0x0 0x0 0x0 0x0>;
284 interrupt-parent = <&pic>;
286 #interrupt-cells = <1>;
287 interrupt-map-mask = <0 0 0 0>;
288 interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
291 pci_bridge@d,0 {
292 compatible = "pci0014,7a19.1",
293 "pci0014,7a19",
297 reg = <0x6800 0x0 0x0 0x0 0x0>;
299 interrupt-parent = <&pic>;
301 #interrupt-cells = <1>;
302 interrupt-map-mask = <0 0 0 0>;
303 interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
306 pci_bridge@e,0 {
307 compatible = "pci0014,7a09.1",
308 "pci0014,7a09",
312 reg = <0x7000 0x0 0x0 0x0 0x0>;
314 interrupt-parent = <&pic>;
316 #interrupt-cells = <1>;
317 interrupt-map-mask = <0 0 0 0>;
318 interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
321 pci_bridge@f,0 {
322 compatible = "pci0014,7a29.1",
323 "pci0014,7a29",
327 reg = <0x7800 0x0 0x0 0x0 0x0>;
329 interrupt-parent = <&pic>;
331 #interrupt-cells = <1>;
332 interrupt-map-mask = <0 0 0 0>;
333 interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
336 pci_bridge@10,0 {
337 compatible = "pci0014,7a19.1",
338 "pci0014,7a19",
342 reg = <0x8000 0x0 0x0 0x0 0x0>;
344 interrupt-parent = <&pic>;
346 #interrupt-cells = <1>;
347 interrupt-map-mask = <0 0 0 0>;
348 interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;
351 pci_bridge@11,0 {
352 compatible = "pci0014,7a29.1",
353 "pci0014,7a29",
357 reg = <0x8800 0x0 0x0 0x0 0x0>;
359 interrupt-parent = <&pic>;
361 #interrupt-cells = <1>;
362 interrupt-map-mask = <0 0 0 0>;
363 interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;
366 pci_bridge@12,0 {
367 compatible = "pci0014,7a19.1",
368 "pci0014,7a19",
372 reg = <0x9000 0x0 0x0 0x0 0x0>;
374 interrupt-parent = <&pic>;
376 #interrupt-cells = <1>;
377 interrupt-map-mask = <0 0 0 0>;
378 interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;
381 pci_bridge@13,0 {
382 compatible = "pci0014,7a29.1",
383 "pci0014,7a29",
387 reg = <0x9800 0x0 0x0 0x0 0x0>;
389 interrupt-parent = <&pic>;
391 #interrupt-cells = <1>;
392 interrupt-map-mask = <0 0 0 0>;
393 interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;
396 pci_bridge@14,0 {
397 compatible = "pci0014,7a19.1",
398 "pci0014,7a19",
402 reg = <0xa000 0x0 0x0 0x0 0x0>;
404 interrupt-parent = <&pic>;
406 #interrupt-cells = <1>;
407 interrupt-map-mask = <0 0 0 0>;
408 interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;
414 #address-cells = <2>;
415 #size-cells = <1>;
416 ranges = <1 0 0 0x18000000 0x20000>;