Lines Matching +full:big +full:- +full:endian +full:- +full:desc
11 * Copyright (C) 2006-2008 Felix Fietkau <nbd@openwrt.org>
81 #define AR2315_RESET_MPEGTS_RSVD 0x00000004 /* warm reset MPEG-TS */
97 #define AR2315_ARB_MPEGTS_RSVD 0x00000004 /* MPEG-TS */
106 #define AR2315_CONFIG_AHB 0x00000001 /* EC-AHB bridge endian */
108 #define AR2315_CONFIG_MPEGTS_RSVD 0x00000004 /* MPEG-TS byteswap */
110 #define AR2315_CONFIG_MEMCTL 0x00000010 /* Mem controller endian */
114 #define AR2315_CONFIG_CPU 0x00000400 /* CPU big endian */
128 /* Revision Register - Initial value is 0x3010 (WMAC 3.0, AR231X 1.0). */
172 #define AR2315_GISR_MPEGTS_RSVD 0x00000004 /* MPEG-TS */
303 * - No read or write buffers are included.
323 #define AR2315_LBCONF_OE 0x00000001 /* =1 OE is low-true */
324 #define AR2315_LBCONF_CS0 0x00000002 /* =1 first CS is low-true */
325 #define AR2315_LBCONF_CS1 0x00000004 /* =1 2nd CS is low-true */
326 #define AR2315_LBCONF_RDY 0x00000008 /* =1 RDY is low-true */
327 #define AR2315_LBCONF_WE 0x00000010 /* =1 Write En is low-true */
328 #define AR2315_LBCONF_WAIT 0x00000020 /* =1 WAIT is low-true */
329 #define AR2315_LBCONF_ADS 0x00000040 /* =1 Adr Strobe is low-true */
341 #define AR2315_LBCONF_INT_CTR0 0x00000000 /* GND high-Z, Vdd is high-Z */
342 #define AR2315_LBCONF_INT_CTR1 0x00040000 /* GND drive, Vdd is high-Z */
343 #define AR2315_LBCONF_INT_CTR2 0x00080000 /* GND high-Z, Vdd drive */
363 #define AR2315_LMB_DESCSWAP_EN 0x00000010 /* Byte swap desc enable */