Lines Matching +full:tx +full:- +full:output +full:- +full:mode
1 /* SPDX-License-Identifier: GPL-2.0 */
5 * mcfuart.h -- ColdFire internal UART support defines.
7 * (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com)
29 #define MCFUART_UMR 0x00 /* Mode register (r/w) */
52 #define MCFUART_UOP1 0x38 /* Output Port Bit Set (w) */
53 #define MCFUART_UOP0 0x3c /* Output Port Bit Reset (w) */
57 * Define bit flags in Mode Register 1 (MR1).
62 #define MCFUART_MR1_RXERRBLOCK 0x20 /* RX block error mode */
63 #define MCFUART_MR1_RXERRCHAR 0x00 /* RX char error mode */
77 * Define bit flags in Mode Register 2 (MR2).
79 #define MCFUART_MR2_LOOPBACK 0x80 /* Loopback mode */
80 #define MCFUART_MR2_REMOTELOOP 0xc0 /* Remote loopback mode */
82 #define MCFUART_MR2_TXRTS 0x20 /* Assert RTS on TX */
111 #define MCFUART_UCSR_TXCLKTIMER 0x0d /* TX clock is timer */
112 #define MCFUART_UCSR_TXCLKEXT16 0x0e /* TX clock is external x16 */
113 #define MCFUART_UCSR_TXCLKEXT1 0x0f /* TX clock is external x1 */
127 #define MCFUART_UCR_TXNULL 0x00 /* No TX command */
128 #define MCFUART_UCR_TXENABLE 0x04 /* Enable TX */
129 #define MCFUART_UCR_TXDISABLE 0x08 /* Disable TX */
146 * Define bit flags in Output Port Registers (UOP).