Lines Matching +full:can +full:- +full:clock +full:- +full:select
1 # SPDX-License-Identifier: GPL-2.0
13 applications, and are all System-On-Chip (SOC) devices, as opposed
17 MC68xxx processor, select M68KCLASSIC.
19 processor, select COLDFIRE.
23 select HAVE_ARCH_PFN_VALID
27 select ARCH_HAVE_CUSTOM_GPIO_H
28 select CPU_HAS_NO_BITFIELDS
29 select CPU_HAS_NO_CAS
30 select CPU_HAS_NO_MULDIV64
31 select GENERIC_CSUM
32 select GPIOLIB
33 select HAVE_LEGACY_CLK
42 select CPU_HAS_NO_BITFIELDS
43 select CPU_HAS_NO_CAS
44 select CPU_HAS_NO_MULDIV64
45 select CPU_HAS_NO_UNALIGNED
46 select GENERIC_CSUM
47 select CPU_NO_EFFICIENT_FFS
48 select HAVE_ARCH_HASH
49 select LEGACY_TIMER_TICK
54 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
60 select FPU
61 select CPU_HAS_ADDRESS_SPACES
71 select FPU
72 select CPU_HAS_ADDRESS_SPACES
81 select FPU
82 select CPU_HAS_ADDRESS_SPACES
92 select FPU
93 select CPU_HAS_ADDRESS_SPACES
101 select M68000
108 select M68000
115 select M68000
127 Select the type of ColdFire System-on-Chip (SoC) that you want
133 select COLDFIRE_SW_A7
134 select COLDFIRE_TIMERS
135 select HAVE_MBAR
136 select CPU_NO_EFFICIENT_FFS
143 select COLDFIRE_SW_A7
144 select COLDFIRE_TIMERS
145 select HAVE_MBAR
146 select CPU_NO_EFFICIENT_FFS
153 select COLDFIRE_PIT_TIMER
154 select HAVE_CACHE_SPLIT
161 select COLDFIRE_PIT_TIMER
162 select HAVE_CACHE_SPLIT
163 select HAVE_IPSBAR
170 select COLDFIRE_SW_A7
171 select COLDFIRE_TIMERS
172 select HAVE_MBAR
173 select CPU_NO_EFFICIENT_FFS
180 select COLDFIRE_SW_A7
181 select COLDFIRE_TIMERS
182 select HAVE_MBAR
183 select CPU_NO_EFFICIENT_FFS
190 select COLDFIRE_PIT_TIMER
191 select M527x
192 select HAVE_CACHE_SPLIT
193 select HAVE_IPSBAR
200 select COLDFIRE_SW_A7
201 select COLDFIRE_TIMERS
202 select HAVE_MBAR
203 select CPU_NO_EFFICIENT_FFS
210 select COLDFIRE_PIT_TIMER
211 select M527x
212 select HAVE_CACHE_SPLIT
213 select HAVE_IPSBAR
220 select COLDFIRE_PIT_TIMER
221 select HAVE_CACHE_SPLIT
222 select HAVE_IPSBAR
229 select COLDFIRE_TIMERS
230 select COLDFIRE_SW_A7
231 select HAVE_CACHE_CB
232 select HAVE_MBAR
233 select CPU_NO_EFFICIENT_FFS
240 select COLDFIRE_TIMERS
241 select M53xx
242 select HAVE_CACHE_CB
249 select COLDFIRE_TIMERS
250 select M53xx
251 select HAVE_CACHE_CB
258 select COLDFIRE_SW_A7
259 select COLDFIRE_TIMERS
260 select HAVE_CACHE_CB
261 select HAVE_MBAR
262 select CPU_NO_EFFICIENT_FFS
268 select M54xx
269 select COLDFIRE_SLTIMERS
270 select MMU_COLDFIRE if MMU
271 select FPU if MMU
272 select HAVE_CACHE_CB
273 select HAVE_MBAR
274 select CPU_NO_EFFICIENT_FFS
280 select COLDFIRE_SLTIMERS
281 select MMU_COLDFIRE if MMU
282 select FPU if MMU
283 select M54xx
284 select HAVE_CACHE_CB
285 select HAVE_MBAR
286 select CPU_NO_EFFICIENT_FFS
292 select COLDFIRE_PIT_TIMER
293 select MMU_COLDFIRE if MMU
294 select HAVE_CACHE_CB
307 select HAVE_PCI
315 select LEGACY_TIMER_TICK
319 select LEGACY_TIMER_TICK
329 At some point in the future, this will cause floating-point math
331 floating-point math coprocessor. Thrill-seekers and chronically
332 sleep-deprived psychotic hacker types can say Y now, everyone else
340 correct rounding, the emulator can (often) do the same but this
341 extra calculation can cost quite some time, so you can disable
350 This option prevents any floating-point instructions from being
353 kernel will only be usable on machines without a floating-point
355 needs to be executed whether a floating-point instruction in the
374 bool "Use read-modify-write instructions"
378 read-modify-write bus cycles. While this is faster than the
379 workaround of disabling interrupts, it can conflict with DMA
383 configuration where it should work are 68030-based Ataris, where it
420 bool "Use write-through caching for 68060 supervisor accesses"
424 Copyback caching means that memory writes will be held in an on-chip
453 select ALTERNATE_USER_ADDRESS_SPACE
474 int "Set the core clock frequency"
486 Define the CPU clock frequency in use. This is the core clock
487 frequency, it may or may not be the same as the external clock
489 PLL and can have their frequency programmed at run time, others
530 bool "Write-through"
532 The ColdFire CPU cache is set into Write-through mode.
535 bool "Copy-back"
537 The ColdFire CPU cache is set into Copy-back mode.