Lines Matching refs:t0
47 li.d t0, CSR_DMW0_INIT # UC, PLV0, 0x8000 xxxx xxxx xxxx
48 csrwr t0, LOONGARCH_CSR_DMWIN0
49 li.d t0, CSR_DMW1_INIT # CA, PLV0, 0x9000 xxxx xxxx xxxx
50 csrwr t0, LOONGARCH_CSR_DMWIN1
54 la.abs t0, 0f
55 jr t0
58 li.w t0, 0xb0 # PLV=0, IE=0, PG=1
59 csrwr t0, LOONGARCH_CSR_CRMD
60 li.w t0, 0x04 # PLV=0, PIE=1, PWE=0
61 csrwr t0, LOONGARCH_CSR_PRMD
62 li.w t0, 0x00 # FPE=0, SXE=0, ASXE=0, BTE=0
63 csrwr t0, LOONGARCH_CSR_EUEN
65 la.pcrel t0, __bss_start # clear .bss
66 st.d zero, t0, 0
69 addi.d t0, t0, LONGSIZE
70 st.d zero, t0, 0
71 bne t0, t1, 1b
73 la.pcrel t0, fw_arg0
74 st.d a0, t0, 0 # firmware arguments
75 la.pcrel t0, fw_arg1
76 st.d a1, t0, 0
77 la.pcrel t0, fw_arg2
78 st.d a2, t0, 0
89 set_saved_sp sp, t0, t1
103 li.d t0, CSR_DMW0_INIT # UC, PLV0
104 csrwr t0, LOONGARCH_CSR_DMWIN0
105 li.d t0, CSR_DMW1_INIT # CA, PLV0
106 csrwr t0, LOONGARCH_CSR_DMWIN1
108 la.abs t0, 0f
109 jr t0
112 li.w t0, 0xb0 # PLV=0, IE=0, PG=1
113 csrwr t0, LOONGARCH_CSR_CRMD
114 li.w t0, 0x04 # PLV=0, PIE=1, PWE=0
115 csrwr t0, LOONGARCH_CSR_PRMD
116 li.w t0, 0x00 # FPE=0, SXE=0, ASXE=0, BTE=0
117 csrwr t0, LOONGARCH_CSR_EUEN
119 la.abs t0, cpuboot_data
120 ld.d sp, t0, CPU_BOOT_STACK
121 ld.d tp, t0, CPU_BOOT_TINFO