124 	// PSTATE.UAO is set to zero upon any exception to AArch64  in enter_exception64()
134 	// PSTATE.SS is set to zero upon any exception to AArch64  in enter_exception64()
137 	// PSTATE.IL is set to zero upon any exception to AArch64  in enter_exception64()
140 	// PSTATE.SSBS is set to SCTLR_ELx.DSSBS upon any exception to AArch64  in enter_exception64()
145 	// PSTATE.BTYPE is set to zero upon any exception to AArch64  in enter_exception64()
191 	// CPSR.IT[7:0] are set to zero upon any exception  in get_except32_cpsr()
197 	// CPSR.SSBS is set to SCTLR.DSSBS upon any exception  in get_except32_cpsr()
211 	// CPSR.IL is set to zero upon any exception  in get_except32_cpsr()
216 	// CPSR.IT[7:0] are set to zero upon any exception  in get_except32_cpsr()
219 	// CPSR.E is set to SCTLR.EE upon any exception  in get_except32_cpsr()
225 	// CPSR.A is unchanged upon an exception to Undefined, Supervisor  in get_except32_cpsr()
226 	// CPSR.A is set upon an exception to other modes  in get_except32_cpsr()
233 	// CPSR.I is set upon any exception  in get_except32_cpsr()
238 	// CPSR.F is set upon an exception to FIQ  in get_except32_cpsr()
239 	// CPSR.F is unchanged upon an exception to other modes  in get_except32_cpsr()
246 	// CPSR.T is set to SCTLR.TE upon any exception  in get_except32_cpsr()