Lines Matching +full:start +full:- +full:up

1 /* SPDX-License-Identifier: GPL-2.0-only */
5  * Copyright (C) 1999-2002 Russell King.
26  *	Start addresses are inclusive and end addresses are exclusive; start
27  *	addresses should be rounded down, end addresses up.
29  *	See Documentation/core-api/cachetlb.rst for more information. Please note that
30  *	the implementation assumes non-aliasing VIPT D-cache and (aliasing)
31  *	VIPT I-cache.
33  *	All functions below apply to the interval [start, end)
34  *		- start  - virtual start address (inclusive)
35  *		- end    - virtual end address (exclusive)
37  *	caches_clean_inval_pou(start, end)
39  *		Ensure coherency between the I-cache and the D-cache region to
42  *	caches_clean_inval_user_pou(start, end)
44  *		Ensure coherency between the I-cache and the D-cache region to
48  *	icache_inval_pou(start, end)
50  *		Invalidate I-cache region to the Point of Unification.
52  *	dcache_clean_inval_poc(start, end)
54  *		Clean and invalidate D-cache region to the Point of Coherency.
56  *	dcache_inval_poc(start, end)
58  *		Invalidate D-cache region to the Point of Coherency.
60  *	dcache_clean_poc(start, end)
62  *		Clean D-cache region to the Point of Coherency.
64  *	dcache_clean_pop(start, end)
66  *		Clean D-cache region to the Point of Persistence.
68  *	dcache_clean_pou(start, end)
70  *		Clean D-cache region to the Point of Unification.
72 extern void caches_clean_inval_pou(unsigned long start, unsigned long end);
73 extern void icache_inval_pou(unsigned long start, unsigned long end);
74 extern void dcache_clean_inval_poc(unsigned long start, unsigned long end);
75 extern void dcache_inval_poc(unsigned long start, unsigned long end);
76 extern void dcache_clean_poc(unsigned long start, unsigned long end);
77 extern void dcache_clean_pop(unsigned long start, unsigned long end);
78 extern void dcache_clean_pou(unsigned long start, unsigned long end);
79 extern long caches_clean_inval_user_pou(unsigned long start, unsigned long end);
80 extern void sync_icache_aliases(unsigned long start, unsigned long end);
82 static inline void flush_icache_range(unsigned long start, unsigned long end)  in flush_icache_range()  argument
84 	caches_clean_inval_pou(start, end);  in flush_icache_range()
96 	 * turns out, KGDB uses IPIs to round-up the secondary CPUs during  in flush_icache_range()
98 	 * In which case, add a KGDB-specific bodge and return early.  in flush_icache_range()
118  * cache page at virtual address page->virtual.
140 #include <asm-generic/cacheflush.h>