Lines Matching +full:tx +full:- +full:internal +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2016 - 2021, Xilinx, Inc.
10 #include "zynqmp-zcu102-revA.dts"
14 compatible = "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
18 phy-handle = <&phyc>;
19 phyc: ethernet-phy@c {
21 ti,rx-internal-delay = <0x8>;
22 ti,tx-internal-delay = <0xa>;
23 ti,fifo-depth = <0x1>;
24 ti,dp83867-rxctrl-strap-quirk;
25 /* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */
28 /delete-node/ ethernet-phy@21;
33 i2c-mux@75 {
39 /delete-node/ max15303@20;