Lines Matching +full:zynqmp +full:- +full:rtc
1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm016-dc2
5 * (C) Copyright 2015 - 2021, Xilinx, Inc.
10 /dts-v1/;
12 #include "zynqmp.dtsi"
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
18 model = "ZynqMP zc1751-xm016-dc2 RevA";
19 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
24 rtc0 = &rtc;
34 stdout-path = "serial0:115200n8";
45 pinctrl-names = "default";
46 pinctrl-0 = <&pinctrl_can0_default>;
51 pinctrl-names = "default";
52 pinctrl-0 = <&pinctrl_can1_default>;
89 phy-handle = <&phy0>;
90 phy-mode = "rgmii-id";
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_gem2_default>;
93 phy0: ethernet-phy@5 {
95 ti,rx-internal-delay = <0x8>;
96 ti,tx-internal-delay = <0xa>;
97 ti,fifo-depth = <0x1>;
98 ti,dp83867-rxctrl-strap-quirk;
108 clock-frequency = <400000>;
109 pinctrl-names = "default", "gpio";
110 pinctrl-0 = <&pinctrl_i2c0_default>;
111 pinctrl-1 = <&pinctrl_i2c0_gpio>;
112 scl-gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
113 sda-gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
118 gpio-controller;
119 #gpio-cells = <2>;
123 rtc@68 {
131 pinctrl-names = "default";
132 pinctrl-0 = <&pinctrl_nand0_default>;
133 arasan,has-mdma;
137 #address-cells = <0x2>;
138 #size-cells = <0x1>;
139 nand-ecc-mode = "soft";
140 nand-ecc-algo = "bch";
141 nand-rb = <0>;
142 label = "main-storage-0";
146 #address-cells = <0x2>;
147 #size-cells = <0x1>;
148 nand-ecc-mode = "soft";
149 nand-ecc-algo = "bch";
150 nand-rb = <0>;
151 label = "main-storage-1";
157 pinctrl_can0_default: can0-default {
165 slew-rate = <SLEW_RATE_SLOW>;
166 power-source = <IO_STANDARD_LVCMOS18>;
169 conf-rx {
171 bias-high-impedance;
174 conf-tx {
176 bias-disable;
180 pinctrl_can1_default: can1-default {
188 slew-rate = <SLEW_RATE_SLOW>;
189 power-source = <IO_STANDARD_LVCMOS18>;
192 conf-rx {
194 bias-high-impedance;
197 conf-tx {
199 bias-disable;
203 pinctrl_i2c0_default: i2c0-default {
211 bias-pull-up;
212 slew-rate = <SLEW_RATE_SLOW>;
213 power-source = <IO_STANDARD_LVCMOS18>;
217 pinctrl_i2c0_gpio: i2c0-gpio {
225 slew-rate = <SLEW_RATE_SLOW>;
226 power-source = <IO_STANDARD_LVCMOS18>;
230 pinctrl_uart0_default: uart0-default {
238 slew-rate = <SLEW_RATE_SLOW>;
239 power-source = <IO_STANDARD_LVCMOS18>;
242 conf-rx {
244 bias-high-impedance;
247 conf-tx {
249 bias-disable;
253 pinctrl_uart1_default: uart1-default {
261 slew-rate = <SLEW_RATE_SLOW>;
262 power-source = <IO_STANDARD_LVCMOS18>;
265 conf-rx {
267 bias-high-impedance;
270 conf-tx {
272 bias-disable;
276 pinctrl_usb1_default: usb1-default {
284 slew-rate = <SLEW_RATE_SLOW>;
285 power-source = <IO_STANDARD_LVCMOS18>;
288 conf-rx {
290 bias-high-impedance;
293 conf-tx {
296 bias-disable;
300 pinctrl_gem2_default: gem2-default {
308 slew-rate = <SLEW_RATE_SLOW>;
309 power-source = <IO_STANDARD_LVCMOS18>;
312 conf-rx {
315 bias-high-impedance;
316 low-power-disable;
319 conf-tx {
322 bias-disable;
323 low-power-enable;
326 mux-mdio {
331 conf-mdio {
333 slew-rate = <SLEW_RATE_SLOW>;
334 power-source = <IO_STANDARD_LVCMOS18>;
335 bias-disable;
339 pinctrl_nand0_default: nand0-default {
347 bias-pull-up;
350 mux-ce {
355 conf-ce {
357 bias-pull-up;
360 mux-rb {
365 conf-rb {
367 bias-pull-up;
370 mux-dqs {
375 conf-dqs {
377 bias-pull-up;
381 pinctrl_spi0_default: spi0-default {
389 bias-disable;
390 slew-rate = <SLEW_RATE_SLOW>;
391 power-source = <IO_STANDARD_LVCMOS18>;
394 mux-cs {
400 conf-cs {
403 bias-disable;
407 pinctrl_spi1_default: spi1-default {
415 bias-disable;
416 slew-rate = <SLEW_RATE_SLOW>;
417 power-source = <IO_STANDARD_LVCMOS18>;
420 mux-cs {
426 conf-cs {
429 bias-disable;
434 &rtc {
440 num-cs = <1>;
441 pinctrl-names = "default";
442 pinctrl-0 = <&pinctrl_spi0_default>;
445 #address-cells = <1>;
446 #size-cells = <1>;
447 compatible = "sst,sst25wf080", "jedec,spi-nor";
448 spi-max-frequency = <50000000>;
452 label = "spi0-data";
460 num-cs = <1>;
461 pinctrl-names = "default";
462 pinctrl-0 = <&pinctrl_spi1_default>;
465 #address-cells = <1>;
466 #size-cells = <1>;
468 spi-max-frequency = <20000000>;
472 label = "spi1-data";
481 pinctrl-names = "default";
482 pinctrl-0 = <&pinctrl_usb1_default>;
489 maximum-speed = "super-speed";
494 pinctrl-names = "default";
495 pinctrl-0 = <&pinctrl_uart0_default>;
500 pinctrl-names = "default";
501 pinctrl-0 = <&pinctrl_uart1_default>;