Lines Matching +full:0 +full:x32c00000
11 reg = <0x0 0x70000000 0x0 0x400000>;
14 ranges = <0x0 0x0 0x70000000 0x400000>;
16 atf-sram@0 {
17 reg = <0x0 0x20000>;
21 reg = <0x1f0000 0x10000>;
25 reg = <0x200000 0x200000>;
36 reg = <0x00 0x01800000 0x00 0x100000>, /* GICD */
37 <0x00 0x01900000 0x00 0x100000>, /* GICR */
38 <0x00 0x6f000000 0x00 0x2000>, /* GICC */
39 <0x00 0x6f010000 0x00 0x1000>, /* GICH */
40 <0x00 0x6f020000 0x00 0x2000>; /* GICV */
47 reg = <0x00 0x01820000 0x00 0x10000>;
48 socionext,synquacer-pre-its = <0x1000000 0x400000>;
56 reg = <0x00 0x00a00000 0x00 0x800>;
68 /* Proxy 0 addressing */
69 reg = <0x0 0x11c000 0x0 0x120>;
72 pinctrl-single,function-mask = <0xffffffff>;
77 reg = <0x00 0x02800000 0x00 0x200>;
87 reg = <0x00 0x02810000 0x00 0x200>;
97 reg = <0x00 0x02820000 0x00 0x200>;
107 reg = <0x00 0x02830000 0x00 0x200>;
117 reg = <0x00 0x02840000 0x00 0x200>;
127 reg = <0x00 0x02850000 0x00 0x200>;
137 reg = <0x00 0x02860000 0x00 0x200>;
147 reg = <0x00 0x02870000 0x00 0x200>;
157 reg = <0x00 0x02880000 0x00 0x200>;
167 reg = <0x00 0x02890000 0x00 0x200>;
177 reg = <0x00 0x00600000 0x00 0x100>;
185 ti,davinci-gpio-unbanked = <0>;
187 clocks = <&k3_clks 111 0>;
193 reg = <0x00 0x00610000 0x00 0x100>;
201 ti,davinci-gpio-unbanked = <0>;
203 clocks = <&k3_clks 112 0>;
209 reg = <0x00 0x00620000 0x00 0x100>;
217 ti,davinci-gpio-unbanked = <0>;
219 clocks = <&k3_clks 113 0>;
225 reg = <0x00 0x00630000 0x00 0x100>;
233 ti,davinci-gpio-unbanked = <0>;
235 clocks = <&k3_clks 114 0>;
241 reg = <0x00 0x02000000 0x00 0x100>;
244 #size-cells = <0>;
252 reg = <0x00 0x02010000 0x00 0x100>;
255 #size-cells = <0>;
263 reg = <0x00 0x02020000 0x00 0x100>;
266 #size-cells = <0>;
274 reg = <0x00 0x02030000 0x00 0x100>;
277 #size-cells = <0>;
285 reg = <0x00 0x02040000 0x00 0x100>;
288 #size-cells = <0>;
296 reg = <0x00 0x02050000 0x00 0x100>;
299 #size-cells = <0>;
307 reg = <0x00 0x02060000 0x00 0x100>;
310 #size-cells = <0>;
318 reg = <0x00 0x04f80000 0x00 0x1000>,
319 <0x00 0x04f88000 0x00 0x400>;
327 ti,otap-del-sel-legacy = <0x0>;
328 ti,otap-del-sel-mmc-hs = <0x0>;
329 ti,otap-del-sel-ddr52 = <0x6>;
330 ti,otap-del-sel-hs200 = <0x8>;
331 ti,otap-del-sel-hs400 = <0x5>;
332 ti,itap-del-sel-legacy = <0x10>;
333 ti,itap-del-sel-mmc-hs = <0xa>;
334 ti,strobe-sel = <0x77>;
335 ti,clkbuf-sel = <0x7>;
336 ti,trm-icp = <0x8>;
345 reg = <0x00 0x04fb0000 0x00 0x1000>,
346 <0x00 0x04fb8000 0x00 0x400>;
354 ti,otap-del-sel-legacy = <0x0>;
355 ti,otap-del-sel-sd-hs = <0x0>;
356 ti,otap-del-sel-sdr12 = <0xf>;
357 ti,otap-del-sel-sdr25 = <0xf>;
358 ti,otap-del-sel-sdr50 = <0xc>;
359 ti,otap-del-sel-sdr104 = <0x5>;
360 ti,otap-del-sel-ddr50 = <0xc>;
361 ti,itap-del-sel-legacy = <0x0>;
362 ti,itap-del-sel-sd-hs = <0x0>;
363 ti,itap-del-sel-sdr12 = <0x0>;
364 ti,itap-del-sel-sdr25 = <0x0>;
365 ti,clkbuf-sel = <0x7>;
366 ti,trm-icp = <0x8>;
369 sdhci-caps-mask = <0x00000003 0x00000000>;
376 ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>;
383 reg = <0x00 0x310e0000 0x00 0x4000>;
390 ti,interrupt-ranges = <0 64 64>,
397 reg = <0x00 0x33d00000 0x00 0x100000>;
399 #interrupt-cells = <0>;
404 ti,interrupt-ranges = <0 0 256>;
411 reg = <0x00 0x32c00000 0x00 0x100000>,
412 <0x00 0x32400000 0x00 0x100000>,
413 <0x00 0x32800000 0x00 0x100000>;
420 reg = <0x00 0x30e00000 0x00 0x1000>;
426 reg = <0x00 0x31f80000 0x00 0x200>;
435 reg = <0x00 0x31f81000 0x00 0x200>;
444 reg = <0x00 0x31f82000 0x00 0x200>;
453 reg = <0x00 0x31f83000 0x00 0x200>;
462 reg = <0x00 0x31f84000 0x00 0x200>;
471 reg = <0x00 0x31f85000 0x00 0x200>;
480 reg = <0x00 0x31f86000 0x00 0x200>;
489 reg = <0x00 0x31f87000 0x00 0x200>;
498 reg = <0x00 0x31f88000 0x00 0x200>;
507 reg = <0x00 0x31f89000 0x00 0x200>;
516 reg = <0x00 0x31f8a000 0x00 0x200>;
525 reg = <0x00 0x31f8b000 0x00 0x200>;
534 reg = <0x00 0x31f90000 0x00 0x200>;
543 reg = <0x00 0x31f91000 0x00 0x200>;
552 reg = <0x00 0x31f92000 0x00 0x200>;
561 reg = <0x00 0x31f93000 0x00 0x200>;
570 reg = <0x00 0x31f94000 0x00 0x200>;
579 reg = <0x00 0x31f95000 0x00 0x200>;
588 reg = <0x00 0x31f96000 0x00 0x200>;
597 reg = <0x00 0x31f97000 0x00 0x200>;
606 reg = <0x00 0x31f98000 0x00 0x200>;
615 reg = <0x00 0x31f99000 0x00 0x200>;
624 reg = <0x00 0x31f9a000 0x00 0x200>;
633 reg = <0x00 0x31f9b000 0x00 0x200>;
642 reg = <0x0 0x3c000000 0x0 0x400000>,
643 <0x0 0x38000000 0x0 0x400000>,
644 <0x0 0x31120000 0x0 0x100>,
645 <0x0 0x33000000 0x0 0x40000>;
648 ti,sci-rm-range-gp-rings = <0x1>;
656 reg = <0x0 0x31150000 0x0 0x100>,
657 <0x0 0x34000000 0x0 0x80000>,
658 <0x0 0x35000000 0x0 0x200000>;
667 ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
668 <0x0f>, /* TX_HCHAN */
669 <0x10>; /* TX_UHCHAN */
670 ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
671 <0x0b>, /* RX_HCHAN */
672 <0x0c>; /* RX_UHCHAN */
673 ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
678 reg = <0x0 0x310d0000 0x0 0x400>;
691 reg = <0x00 0x02701000 0x00 0x200>,
692 <0x00 0x02708000 0x00 0x8000>;
695 clocks = <&k3_clks 182 0>, <&k3_clks 182 1>;
700 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
705 reg = <0x00 0x02711000 0x00 0x200>,
706 <0x00 0x02718000 0x00 0x8000>;
709 clocks = <&k3_clks 183 0>, <&k3_clks 183 1>;
714 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
719 reg = <0x00 0x02721000 0x00 0x200>,
720 <0x00 0x02728000 0x00 0x8000>;
723 clocks = <&k3_clks 184 0>, <&k3_clks 184 1>;
728 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
733 reg = <0x00 0x02731000 0x00 0x200>,
734 <0x00 0x02738000 0x00 0x8000>;
737 clocks = <&k3_clks 185 0>, <&k3_clks 185 1>;
742 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
747 reg = <0x00 0x02741000 0x00 0x200>,
748 <0x00 0x02748000 0x00 0x8000>;
751 clocks = <&k3_clks 186 0>, <&k3_clks 186 1>;
756 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
761 reg = <0x00 0x02751000 0x00 0x200>,
762 <0x00 0x02758000 0x00 0x8000>;
765 clocks = <&k3_clks 187 0>, <&k3_clks 187 1>;
770 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
775 reg = <0x00 0x02761000 0x00 0x200>,
776 <0x00 0x02768000 0x00 0x8000>;
779 clocks = <&k3_clks 188 0>, <&k3_clks 188 1>;
784 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
789 reg = <0x00 0x02771000 0x00 0x200>,
790 <0x00 0x02778000 0x00 0x8000>;
793 clocks = <&k3_clks 189 0>, <&k3_clks 189 1>;
798 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
803 reg = <0x00 0x02781000 0x00 0x200>,
804 <0x00 0x02788000 0x00 0x8000>;
807 clocks = <&k3_clks 190 0>, <&k3_clks 190 1>;
812 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
817 reg = <0x00 0x02791000 0x00 0x200>,
818 <0x00 0x02798000 0x00 0x8000>;
821 clocks = <&k3_clks 191 0>, <&k3_clks 191 1>;
826 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
831 reg = <0x00 0x027a1000 0x00 0x200>,
832 <0x00 0x027a8000 0x00 0x8000>;
835 clocks = <&k3_clks 192 0>, <&k3_clks 192 1>;
840 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
845 reg = <0x00 0x027b1000 0x00 0x200>,
846 <0x00 0x027b8000 0x00 0x8000>;
849 clocks = <&k3_clks 193 0>, <&k3_clks 193 1>;
854 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
859 reg = <0x00 0x027c1000 0x00 0x200>,
860 <0x00 0x027c8000 0x00 0x8000>;
863 clocks = <&k3_clks 194 0>, <&k3_clks 194 1>;
868 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
873 reg = <0x00 0x027d1000 0x00 0x200>,
874 <0x00 0x027d8000 0x00 0x8000>;
877 clocks = <&k3_clks 195 0>, <&k3_clks 195 1>;
882 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
887 reg = <0x00 0x02681000 0x00 0x200>,
888 <0x00 0x02688000 0x00 0x8000>;
891 clocks = <&k3_clks 197 0>, <&k3_clks 197 1>;
896 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
901 reg = <0x00 0x02691000 0x00 0x200>,
902 <0x00 0x02698000 0x00 0x8000>;
905 clocks = <&k3_clks 199 0>, <&k3_clks 199 1>;
910 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
915 reg = <0x00 0x026a1000 0x00 0x200>,
916 <0x00 0x026a8000 0x00 0x8000>;
919 clocks = <&k3_clks 201 0>, <&k3_clks 201 1>;
924 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
929 reg = <0x00 0x026b1000 0x00 0x200>,
930 <0x00 0x026b8000 0x00 0x8000>;
933 clocks = <&k3_clks 206 0>, <&k3_clks 206 1>;
938 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;