Lines Matching +full:fw +full:- +full:cfg +full:- +full:mmio
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
26 k3_clks: clock-controller {
27 compatible = "ti,k2g-sci-clk";
28 #clock-cells = <2>;
31 k3_reset: reset-controller {
32 compatible = "ti,sci-reset";
33 #reset-cells = <2>;
38 compatible = "syscon", "simple-mfd";
40 #address-cells = <1>;
41 #size-cells = <1>;
45 compatible = "ti,am654-phy-gmii-sel";
47 #phy-cells = <1>;
52 compatible = "ti,am654-chipid";
57 compatible = "pinctrl-single";
60 #pinctrl-cells = <1>;
61 pinctrl-single,register-width = <32>;
62 pinctrl-single,function-mask = <0xffffffff>;
66 compatible = "mmio-sram";
69 #address-cells = <1>;
70 #size-cells = <1>;
74 compatible = "ti,j721e-uart", "ti,am654-uart";
77 clock-frequency = <48000000>;
78 current-speed = <115200>;
79 power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
81 clock-names = "fclk";
85 compatible = "ti,j721e-uart", "ti,am654-uart";
88 clock-frequency = <96000000>;
89 current-speed = <115200>;
90 power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
92 clock-names = "fclk";
95 wkup_gpio_intr: interrupt-controller@42200000 {
96 compatible = "ti,sci-intr";
98 ti,intr-trigger-type = <1>;
99 interrupt-controller;
100 interrupt-parent = <&gic500>;
101 #interrupt-cells = <1>;
103 ti,sci-dev-id = <137>;
104 ti,interrupt-ranges = <16 960 16>;
108 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
110 gpio-controller;
111 #gpio-cells = <2>;
112 interrupt-parent = <&wkup_gpio_intr>;
114 interrupt-controller;
115 #interrupt-cells = <2>;
117 ti,davinci-gpio-unbanked = <0>;
118 power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
120 clock-names = "gpio";
124 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
126 gpio-controller;
127 #gpio-cells = <2>;
128 interrupt-parent = <&wkup_gpio_intr>;
130 interrupt-controller;
131 #interrupt-cells = <2>;
133 ti,davinci-gpio-unbanked = <0>;
134 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
136 clock-names = "gpio";
140 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
143 #address-cells = <1>;
144 #size-cells = <0>;
145 clock-names = "fck";
147 power-domains = <&k3_pds 194 TI_SCI_PD_EXCLUSIVE>;
151 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
154 #address-cells = <1>;
155 #size-cells = <0>;
156 clock-names = "fck";
158 power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>;
162 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
165 #address-cells = <1>;
166 #size-cells = <0>;
167 clock-names = "fck";
169 power-domains = <&k3_pds 197 TI_SCI_PD_SHARED>;
173 compatible = "simple-bus";
175 #address-cells = <2>;
176 #size-cells = <2>;
180 compatible = "ti,am654-ospi", "cdns,qspi-nor";
184 cdns,fifo-depth = <256>;
185 cdns,fifo-width = <4>;
186 cdns,trigger-address = <0x0>;
188 assigned-clocks = <&k3_clks 103 0>;
189 assigned-clock-parents = <&k3_clks 103 2>;
190 assigned-clock-rates = <166666666>;
191 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
192 #address-cells = <1>;
193 #size-cells = <0>;
197 compatible = "ti,am654-ospi", "cdns,qspi-nor";
201 cdns,fifo-depth = <256>;
202 cdns,fifo-width = <4>;
203 cdns,trigger-address = <0x0>;
205 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
206 #address-cells = <1>;
207 #size-cells = <0>;
212 compatible = "ti,am3359-tscadc";
215 power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>;
217 assigned-clocks = <&k3_clks 0 3>;
218 assigned-clock-rates = <60000000>;
219 clock-names = "adc_tsc_fck";
222 dma-names = "fifo0", "fifo1";
225 #io-channel-cells = <1>;
226 compatible = "ti,am3359-adc";
231 compatible = "ti,am3359-tscadc";
234 power-domains = <&k3_pds 1 TI_SCI_PD_EXCLUSIVE>;
236 assigned-clocks = <&k3_clks 1 3>;
237 assigned-clock-rates = <60000000>;
238 clock-names = "adc_tsc_fck";
241 dma-names = "fifo0", "fifo1";
244 #io-channel-cells = <1>;
245 compatible = "ti,am3359-adc";
250 compatible = "simple-mfd";
251 #address-cells = <2>;
252 #size-cells = <2>;
254 dma-coherent;
255 dma-ranges;
257 ti,sci-dev-id = <232>;
260 compatible = "ti,am654-navss-ringacc";
265 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
266 ti,num-rings = <286>;
267 ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
269 ti,sci-dev-id = <235>;
270 msi-parent = <&main_udmass_inta>;
273 mcu_udmap: dma-controller@285c0000 {
274 compatible = "ti,j721e-navss-mcu-udmap";
278 reg-names = "gcfg", "rchanrt", "tchanrt";
279 msi-parent = <&main_udmass_inta>;
280 #dma-cells = <1>;
283 ti,sci-dev-id = <236>;
286 ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
288 ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
290 ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
295 compatible = "ti,j721e-cpsw-nuss";
296 #address-cells = <2>;
297 #size-cells = <2>;
299 reg-names = "cpsw_nuss";
301 dma-coherent;
303 clock-names = "fck";
304 power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
315 dma-names = "tx0", "tx1", "tx2", "tx3",
319 ethernet-ports {
320 #address-cells = <1>;
321 #size-cells = <0>;
325 ti,mac-only;
327 ti,syscon-efuse = <&mcu_conf 0x200>;
333 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
335 #address-cells = <1>;
336 #size-cells = <0>;
338 clock-names = "fck";
343 compatible = "ti,am65-cpts";
346 clock-names = "cpts";
347 interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
348 interrupt-names = "cpts";
349 ti,cpts-ext-ts-inputs = <4>;
350 ti,cpts-periodic-outputs = <2>;
355 compatible = "ti,j721e-r5fss";
356 ti,cluster-mode = <1>;
357 #address-cells = <1>;
358 #size-cells = <1>;
361 power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
364 compatible = "ti,j721e-r5f";
367 reg-names = "atcm", "btcm";
369 ti,sci-dev-id = <250>;
370 ti,sci-proc-ids = <0x01 0xff>;
372 firmware-name = "j7-mcu-r5f0_0-fw";
373 ti,atcm-enable = <1>;
374 ti,btcm-enable = <1>;
379 compatible = "ti,j721e-r5f";
382 reg-names = "atcm", "btcm";
384 ti,sci-dev-id = <251>;
385 ti,sci-proc-ids = <0x02 0xff>;
387 firmware-name = "j7-mcu-r5f0_1-fw";
388 ti,atcm-enable = <1>;
389 ti,btcm-enable = <1>;
398 reg-names = "m_can", "message_ram";
399 power-domains = <&k3_pds 172 TI_SCI_PD_EXCLUSIVE>;
401 clock-names = "hclk", "cclk";
404 interrupt-names = "int0", "int1";
405 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
412 reg-names = "m_can", "message_ram";
413 power-domains = <&k3_pds 173 TI_SCI_PD_EXCLUSIVE>;
415 clock-names = "hclk", "cclk";
418 interrupt-names = "int0", "int1";
419 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;