Lines Matching +full:shared +full:- +full:dma +full:- +full:pool
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j7200.dtsi"
18 reserved_memory: reserved-memory {
19 #address-cells = <2>;
20 #size-cells = <2>;
26 no-map;
29 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
30 compatible = "shared-dma-pool";
32 no-map;
35 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
36 compatible = "shared-dma-pool";
38 no-map;
41 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
42 compatible = "shared-dma-pool";
44 no-map;
47 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
48 compatible = "shared-dma-pool";
50 no-map;
53 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
54 compatible = "shared-dma-pool";
56 no-map;
59 main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
60 compatible = "shared-dma-pool";
62 no-map;
65 main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
66 compatible = "shared-dma-pool";
68 no-map;
71 main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
72 compatible = "shared-dma-pool";
74 no-map;
77 rtos_ipc_memory_region: ipc-memories@a4000000 {
80 no-map;
86 mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-pins-default {
87 pinctrl-single,pins = <
104 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
105 pinctrl-single,pins = <
122 main_i2c0_pins_default: main-i2c0-pins-default {
123 pinctrl-single,pins = <
135 pinctrl-names = "default";
136 pinctrl-0 = <&mcu_fss0_hpb0_pins_default>;
141 compatible = "cypress,hyperflash", "cfi-flash";
149 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
150 ti,mbox-rx = <0 0 0>;
151 ti,mbox-tx = <1 0 0>;
154 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
155 ti,mbox-rx = <2 0 0>;
156 ti,mbox-tx = <3 0 0>;
163 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
164 ti,mbox-rx = <0 0 0>;
165 ti,mbox-tx = <1 0 0>;
168 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
169 ti,mbox-rx = <2 0 0>;
170 ti,mbox-tx = <3 0 0>;
216 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
222 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
228 memory-region = <&main_r5fss0_core0_dma_memory_region>,
234 memory-region = <&main_r5fss0_core1_dma_memory_region>,
239 pinctrl-names = "default";
240 pinctrl-0 = <&main_i2c0_pins_default>;
241 clock-frequency = <400000>;
246 gpio-controller;
247 #gpio-cells = <2>;
248 gpio-line-names = "USB2.0_MUX_SEL", "CANUART_MUX1_SEL0",
256 pinctrl-names = "default";
257 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
260 compatible = "jedec,spi-nor";
262 spi-tx-bus-width = <8>;
263 spi-rx-bus-width = <8>;
264 spi-max-frequency = <25000000>;
265 cdns,tshsl-ns = <60>;
266 cdns,tsd2d-ns = <60>;
267 cdns,tchsh-ns = <60>;
268 cdns,tslch-ns = <60>;
269 cdns,read-delay = <4>;