Lines Matching +full:sci +full:- +full:dev +full:- +full:id
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
9 mcu_conf: scm-conf@40f00000 {
10 compatible = "syscon", "simple-mfd";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 compatible = "ti,am654-phy-gmii-sel";
19 #phy-cells = <1>;
24 compatible = "ti,am654-uart";
27 clock-frequency = <96000000>;
28 current-speed = <115200>;
29 power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
33 compatible = "mmio-sram";
36 #address-cells = <1>;
37 #size-cells = <1>;
41 compatible = "ti,am654-i2c", "ti,omap4-i2c";
44 #address-cells = <1>;
45 #size-cells = <0>;
46 clock-names = "fck";
48 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
52 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
56 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
57 #address-cells = <1>;
58 #size-cells = <0>;
62 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
66 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
67 #address-cells = <1>;
68 #size-cells = <0>;
72 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
76 power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
77 #address-cells = <1>;
78 #size-cells = <0>;
82 compatible = "ti,am654-tscadc", "ti,am3359-tscadc";
86 assigned-clocks = <&k3_clks 0 2>;
87 assigned-clock-rates = <60000000>;
88 clock-names = "adc_tsc_fck";
91 dma-names = "fifo0", "fifo1";
94 #io-channel-cells = <1>;
95 compatible = "ti,am654-adc", "ti,am3359-adc";
100 compatible = "ti,am654-tscadc", "ti,am3359-tscadc";
104 assigned-clocks = <&k3_clks 1 2>;
105 assigned-clock-rates = <60000000>;
106 clock-names = "adc_tsc_fck";
109 dma-names = "fifo0", "fifo1";
112 #io-channel-cells = <1>;
113 compatible = "ti,am654-adc", "ti,am3359-adc";
118 compatible = "simple-mfd";
119 #address-cells = <2>;
120 #size-cells = <2>;
122 dma-coherent;
123 dma-ranges;
125 ti,sci-dev-id = <119>;
128 compatible = "ti,am654-navss-ringacc";
133 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
134 ti,num-rings = <286>;
135 ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
136 ti,sci = <&dmsc>;
137 ti,sci-dev-id = <195>;
138 msi-parent = <&inta_main_udmass>;
141 mcu_udmap: dma-controller@285c0000 {
142 compatible = "ti,am654-navss-mcu-udmap";
146 reg-names = "gcfg", "rchanrt", "tchanrt";
147 msi-parent = <&inta_main_udmass>;
148 #dma-cells = <1>;
150 ti,sci = <&dmsc>;
151 ti,sci-dev-id = <194>;
154 ti,sci-rm-range-tchan = <0xf>, /* TX_HCHAN */
156 ti,sci-rm-range-rchan = <0xb>, /* RX_HCHAN */
158 ti,sci-rm-range-rflow = <0x0>; /* GP RFLOW */
166 reg-names = "m_can", "message_ram";
167 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
169 clock-names = "hclk", "cclk";
170 interrupt-parent = <&gic500>;
173 interrupt-names = "int0", "int1";
174 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
181 reg-names = "m_can", "message_ram";
182 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
184 clock-names = "hclk", "cclk";
185 interrupt-parent = <&gic500>;
188 interrupt-names = "int0", "int1";
189 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
193 compatible = "simple-bus";
194 #address-cells = <2>;
195 #size-cells = <2>;
199 compatible = "ti,am654-ospi", "cdns,qspi-nor";
203 cdns,fifo-depth = <256>;
204 cdns,fifo-width = <4>;
205 cdns,trigger-address = <0x0>;
207 assigned-clocks = <&k3_clks 248 0>;
208 assigned-clock-parents = <&k3_clks 248 2>;
209 assigned-clock-rates = <166666666>;
210 power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>;
211 #address-cells = <1>;
212 #size-cells = <0>;
216 compatible = "ti,am654-ospi", "cdns,qspi-nor";
220 cdns,fifo-depth = <256>;
221 cdns,fifo-width = <4>;
222 cdns,trigger-address = <0x0>;
224 power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
225 #address-cells = <1>;
226 #size-cells = <0>;
231 compatible = "ti,am654-cpsw-nuss";
232 #address-cells = <2>;
233 #size-cells = <2>;
235 reg-names = "cpsw_nuss";
237 dma-coherent;
239 clock-names = "fck";
240 power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>;
251 dma-names = "tx0", "tx1", "tx2", "tx3",
255 ethernet-ports {
256 #address-cells = <1>;
257 #size-cells = <0>;
261 ti,mac-only;
263 ti,syscon-efuse = <&mcu_conf 0x200>;
269 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
271 #address-cells = <1>;
272 #size-cells = <0>;
274 clock-names = "fck";
279 compatible = "ti,am65-cpts";
282 clock-names = "cpts";
283 interrupts-extended = <&gic500 GIC_SPI 570 IRQ_TYPE_LEVEL_HIGH>;
284 interrupt-names = "cpts";
285 ti,cpts-ext-ts-inputs = <4>;
286 ti,cpts-periodic-outputs = <2>;
288 mcu_cpsw_cpts_mux: refclk-mux {
289 #clock-cells = <0>;
294 assigned-clocks = <&mcu_cpsw_cpts_mux>;
295 assigned-clock-parents = <&k3_clks 118 5>;
301 compatible = "ti,am654-r5fss";
302 ti,cluster-mode = <1>;
303 #address-cells = <1>;
304 #size-cells = <1>;
307 power-domains = <&k3_pds 129 TI_SCI_PD_EXCLUSIVE>;
310 compatible = "ti,am654-r5f";
313 reg-names = "atcm", "btcm";
314 ti,sci = <&dmsc>;
315 ti,sci-dev-id = <159>;
316 ti,sci-proc-ids = <0x01 0xff>;
318 firmware-name = "am65x-mcu-r5f0_0-fw";
319 ti,atcm-enable = <1>;
320 ti,btcm-enable = <1>;
325 compatible = "ti,am654-r5f";
328 reg-names = "atcm", "btcm";
329 ti,sci = <&dmsc>;
330 ti,sci-dev-id = <245>;
331 ti,sci-proc-ids = <0x02 0xff>;
333 firmware-name = "am65x-mcu-r5f0_1-fw";
334 ti,atcm-enable = <1>;
335 ti,btcm-enable = <1>;
341 compatible = "ti,j7-rti-wdt";
344 power-domains = <&k3_pds 135 TI_SCI_PD_SHARED>;
345 assigned-clocks = <&k3_clks 135 0>;
346 assigned-clock-parents = <&k3_clks 135 4>;