Lines Matching full:k3_clks
63 clocks = <&k3_clks 153 4>, <&k3_clks 153 1>, <&serdes1 AM654_SERDES_LO_REFCLK>;
65 assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
66 assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;
78 clocks = <&serdes0 AM654_SERDES_RO_REFCLK>, <&k3_clks 154 1>, <&k3_clks 154 5>;
80 assigned-clocks = <&k3_clks 154 5>, <&serdes1 AM654_SERDES_CMU_REFCLK>;
81 assigned-clock-parents = <&k3_clks 154 9>, <&k3_clks 154 5>;
129 clocks = <&k3_clks 136 1>;
157 clocks = <&k3_clks 110 1>;
168 clocks = <&k3_clks 111 1>;
179 clocks = <&k3_clks 112 1>;
190 clocks = <&k3_clks 113 1>;
199 clocks = <&k3_clks 39 0>;
207 clocks = <&k3_clks 137 1>;
219 clocks = <&k3_clks 138 1>;
223 assigned-clocks = <&k3_clks 137 1>;
231 clocks = <&k3_clks 139 1>;
241 clocks = <&k3_clks 140 1>;
251 clocks = <&k3_clks 141 1>;
261 clocks = <&k3_clks 47 0>, <&k3_clks 47 1>;
285 clocks = <&k3_clks 48 0>, <&k3_clks 48 1>;
364 clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;
365 assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;
366 assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
367 <&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */
390 clocks = <&k3_clks 151 0>, <&k3_clks 151 1>;
404 clocks = <&k3_clks 152 2>;
405 assigned-clocks = <&k3_clks 152 2>;
406 assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
428 clocks = <&k3_clks 152 0>, <&k3_clks 152 1>;
652 clocks = <&k3_clks 118 5>, <&k3_clks 118 11>,
653 <&k3_clks 118 6>, <&k3_clks 118 3>,
654 <&k3_clks 118 8>, <&k3_clks 118 14>,
655 <&k3_clks 120 3>, <&k3_clks 121 3>;
657 assigned-clock-parents = <&k3_clks 118 5>;
673 clocks = <&k3_clks 57 0>;
688 clocks = <&k3_clks 58 0>;
770 clocks = <&k3_clks 104 0>;
787 clocks = <&k3_clks 105 0>;
804 clocks = <&k3_clks 106 0>;
818 clocks = <&k3_clks 2 0>;
847 clocks = <&k3_clks 67 1>,
848 <&k3_clks 216 1>,
849 <&k3_clks 67 2>;
857 assigned-clocks = <&k3_clks 67 2>;
858 assigned-clock-parents = <&k3_clks 67 5>;
875 clocks = <&ehrpwm_tbclk 0>, <&k3_clks 40 0>;
884 clocks = <&ehrpwm_tbclk 1>, <&k3_clks 41 0>;
893 clocks = <&ehrpwm_tbclk 2>, <&k3_clks 42 0>;
902 clocks = <&ehrpwm_tbclk 3>, <&k3_clks 43 0>;
911 clocks = <&ehrpwm_tbclk 4>, <&k3_clks 44 0>;
920 clocks = <&ehrpwm_tbclk 5>, <&k3_clks 45 0>;
954 clocks = <&k3_clks 62 19>, /* icssg0_core_clk */
955 <&k3_clks 62 3>; /* icssg0_iclk */
957 assigned-clock-parents = <&k3_clks 62 3>;
963 clocks = <&k3_clks 62 10>, /* icssg0_iep_clk */
1057 clocks = <&k3_clks 62 3>;
1095 clocks = <&k3_clks 63 19>, /* icssg1_core_clk */
1096 <&k3_clks 63 3>; /* icssg1_iclk */
1098 assigned-clock-parents = <&k3_clks 63 3>;
1104 clocks = <&k3_clks 63 10>, /* icssg1_iep_clk */
1198 clocks = <&k3_clks 63 3>;
1236 clocks = <&k3_clks 64 19>, /* icssg1_core_clk */
1237 <&k3_clks 64 3>; /* icssg1_iclk */
1239 assigned-clock-parents = <&k3_clks 64 3>;
1245 clocks = <&k3_clks 64 10>, /* icssg1_iep_clk */
1339 clocks = <&k3_clks 64 3>;