Lines Matching +full:am654 +full:- +full:pcie +full:- +full:rc
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
31 compatible = "arm,gic-v3";
32 #address-cells = <2>;
33 #size-cells = <2>;
35 #interrupt-cells = <3>;
36 interrupt-controller;
48 gic_its: msi-controller@1820000 {
49 compatible = "arm,gic-v3-its";
51 socionext,synquacer-pre-its = <0x1000000 0x400000>;
52 msi-controller;
53 #msi-cells = <1>;
58 compatible = "ti,phy-am654-serdes";
60 reg-names = "serdes";
61 #phy-cells = <2>;
62 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
64 clock-output-names = "serdes0_cmu_refclk", "serdes0_lo_refclk", "serdes0_ro_refclk";
65 assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
66 assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;
67 ti,serdes-clk = <&serdes0_clk>;
68 #clock-cells = <1>;
69 mux-controls = <&serdes_mux 0>;
73 compatible = "ti,phy-am654-serdes";
75 reg-names = "serdes";
76 #phy-cells = <2>;
77 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
79 clock-output-names = "serdes1_cmu_refclk", "serdes1_lo_refclk", "serdes1_ro_refclk";
80 assigned-clocks = <&k3_clks 154 5>, <&serdes1 AM654_SERDES_CMU_REFCLK>;
81 assigned-clock-parents = <&k3_clks 154 9>, <&k3_clks 154 5>;
82 ti,serdes-clk = <&serdes1_clk>;
83 #clock-cells = <1>;
84 mux-controls = <&serdes_mux 1>;
88 compatible = "ti,am654-uart";
91 clock-frequency = <48000000>;
92 current-speed = <115200>;
93 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
97 compatible = "ti,am654-uart";
100 clock-frequency = <48000000>;
101 power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
105 compatible = "ti,am654-uart";
108 clock-frequency = <48000000>;
109 power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
113 compatible = "ti,am654-sa2ul";
115 power-domains = <&k3_pds 136 TI_SCI_PD_SHARED>;
116 #address-cells = <2>;
117 #size-cells = <2>;
122 dma-names = "tx", "rx1", "rx2";
123 dma-coherent;
126 compatible = "inside-secure,safexcel-eip76";
130 status = "disabled"; /* Used by OP-TEE */
135 compatible = "pinctrl-single";
137 #pinctrl-cells = <1>;
138 pinctrl-single,register-width = <32>;
139 pinctrl-single,function-mask = <0xffffffff>;
143 compatible = "pinctrl-single";
145 #pinctrl-cells = <1>;
146 pinctrl-single,register-width = <32>;
147 pinctrl-single,function-mask = <0xffffffff>;
151 compatible = "ti,am654-i2c", "ti,omap4-i2c";
154 #address-cells = <1>;
155 #size-cells = <0>;
156 clock-names = "fck";
158 power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
162 compatible = "ti,am654-i2c", "ti,omap4-i2c";
165 #address-cells = <1>;
166 #size-cells = <0>;
167 clock-names = "fck";
169 power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
173 compatible = "ti,am654-i2c", "ti,omap4-i2c";
176 #address-cells = <1>;
177 #size-cells = <0>;
178 clock-names = "fck";
180 power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
184 compatible = "ti,am654-i2c", "ti,omap4-i2c";
187 #address-cells = <1>;
188 #size-cells = <0>;
189 clock-names = "fck";
191 power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
195 compatible = "ti,am654-ecap", "ti,am3352-ecap";
196 #pwm-cells = <3>;
198 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
200 clock-names = "fck";
204 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
208 power-domains = <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
209 #address-cells = <1>;
210 #size-cells = <0>;
212 dma-names = "tx0", "rx0";
216 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
220 power-domains = <&k3_pds 138 TI_SCI_PD_EXCLUSIVE>;
221 #address-cells = <1>;
222 #size-cells = <0>;
223 assigned-clocks = <&k3_clks 137 1>;
224 assigned-clock-rates = <48000000>;
228 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
232 power-domains = <&k3_pds 139 TI_SCI_PD_EXCLUSIVE>;
233 #address-cells = <1>;
234 #size-cells = <0>;
238 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
242 power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;
243 #address-cells = <1>;
244 #size-cells = <0>;
248 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
252 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
253 #address-cells = <1>;
254 #size-cells = <0>;
258 compatible = "ti,am654-sdhci-5.1";
260 power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
262 clock-names = "clk_ahb", "clk_xin";
264 mmc-ddr-1_8v;
265 mmc-hs200-1_8v;
266 ti,otap-del-sel-legacy = <0x0>;
267 ti,otap-del-sel-mmc-hs = <0x0>;
268 ti,otap-del-sel-sd-hs = <0x0>;
269 ti,otap-del-sel-sdr12 = <0x0>;
270 ti,otap-del-sel-sdr25 = <0x0>;
271 ti,otap-del-sel-sdr50 = <0x8>;
272 ti,otap-del-sel-sdr104 = <0x7>;
273 ti,otap-del-sel-ddr50 = <0x5>;
274 ti,otap-del-sel-ddr52 = <0x5>;
275 ti,otap-del-sel-hs200 = <0x5>;
276 ti,otap-del-sel-hs400 = <0x0>;
277 ti,trm-icp = <0x8>;
278 dma-coherent;
282 compatible = "ti,am654-sdhci-5.1";
284 power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
286 clock-names = "clk_ahb", "clk_xin";
288 ti,otap-del-sel-legacy = <0x0>;
289 ti,otap-del-sel-mmc-hs = <0x0>;
290 ti,otap-del-sel-sd-hs = <0x0>;
291 ti,otap-del-sel-sdr12 = <0x0>;
292 ti,otap-del-sel-sdr25 = <0x0>;
293 ti,otap-del-sel-sdr50 = <0x8>;
294 ti,otap-del-sel-sdr104 = <0x7>;
295 ti,otap-del-sel-ddr50 = <0x4>;
296 ti,otap-del-sel-ddr52 = <0x4>;
297 ti,otap-del-sel-hs200 = <0x7>;
298 ti,clkbuf-sel = <0x7>;
299 ti,otap-del-sel = <0x2>;
300 ti,trm-icp = <0x8>;
301 dma-coherent;
304 scm_conf: scm-conf@100000 {
305 compatible = "syscon", "simple-mfd";
307 #address-cells = <1>;
308 #size-cells = <1>;
311 pcie0_mode: pcie-mode@4060 {
316 pcie1_mode: pcie-mode@4070 {
321 pcie_devid: pcie-devid@210 {
336 serdes_mux: mux-controller {
337 compatible = "mmio-mux";
338 #mux-control-cells = <1>;
339 mux-reg-masks = <0x4080 0x3>, /* SERDES0 lane select */
343 dss_oldi_io_ctrl: dss-oldi-io-ctrl@41e0 {
349 compatible = "ti,am654-ehrpwm-tbclk", "syscon";
351 #clock-cells = <1>;
356 compatible = "ti,am654-dwc3";
358 #address-cells = <1>;
359 #size-cells = <1>;
362 dma-coherent;
363 power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>;
365 assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;
366 assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
375 interrupt-names = "peripheral",
378 maximum-speed = "high-speed";
381 phy-names = "usb2-phy";
387 compatible = "ti,am654-usb2", "ti,omap-usb2";
389 syscon-phy-power = <&scm_conf 0x4000>;
391 clock-names = "wkupclk", "refclk";
392 #phy-cells = <0>;
396 compatible = "ti,am654-dwc3";
398 #address-cells = <1>;
399 #size-cells = <1>;
402 dma-coherent;
403 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
405 assigned-clocks = <&k3_clks 152 2>;
406 assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
414 interrupt-names = "peripheral",
417 maximum-speed = "high-speed";
420 phy-names = "usb2-phy";
425 compatible = "ti,am654-usb2", "ti,omap-usb2";
427 syscon-phy-power = <&scm_conf 0x4020>;
429 clock-names = "wkupclk", "refclk";
430 #phy-cells = <0>;
433 intr_main_gpio: interrupt-controller@a00000 {
434 compatible = "ti,sci-intr";
436 ti,intr-trigger-type = <1>;
437 interrupt-controller;
438 interrupt-parent = <&gic500>;
439 #interrupt-cells = <1>;
441 ti,sci-dev-id = <100>;
442 ti,interrupt-ranges = <0 392 32>;
446 compatible = "simple-mfd";
447 #address-cells = <2>;
448 #size-cells = <2>;
450 dma-coherent;
451 dma-ranges;
453 ti,sci-dev-id = <118>;
455 intr_main_navss: interrupt-controller@310e0000 {
456 compatible = "ti,sci-intr";
458 ti,intr-trigger-type = <4>;
459 interrupt-controller;
460 interrupt-parent = <&gic500>;
461 #interrupt-cells = <1>;
463 ti,sci-dev-id = <182>;
464 ti,interrupt-ranges = <0 64 64>,
468 inta_main_udmass: interrupt-controller@33d00000 {
469 compatible = "ti,sci-inta";
471 interrupt-controller;
472 interrupt-parent = <&intr_main_navss>;
473 msi-controller;
474 #interrupt-cells = <0>;
476 ti,sci-dev-id = <179>;
477 ti,interrupt-ranges = <0 0 256>;
481 compatible = "ti,am654-secure-proxy";
482 #mbox-cells = <1>;
483 reg-names = "target_data", "rt", "scfg";
487 interrupt-names = "rx_011";
492 compatible = "ti,am654-hwspinlock";
494 #hwlock-cells = <1>;
498 compatible = "ti,am654-mailbox";
500 #mbox-cells = <1>;
501 ti,mbox-num-users = <4>;
502 ti,mbox-num-fifos = <16>;
503 interrupt-parent = <&intr_main_navss>;
507 compatible = "ti,am654-mailbox";
509 #mbox-cells = <1>;
510 ti,mbox-num-users = <4>;
511 ti,mbox-num-fifos = <16>;
512 interrupt-parent = <&intr_main_navss>;
516 compatible = "ti,am654-mailbox";
518 #mbox-cells = <1>;
519 ti,mbox-num-users = <4>;
520 ti,mbox-num-fifos = <16>;
521 interrupt-parent = <&intr_main_navss>;
525 compatible = "ti,am654-mailbox";
527 #mbox-cells = <1>;
528 ti,mbox-num-users = <4>;
529 ti,mbox-num-fifos = <16>;
530 interrupt-parent = <&intr_main_navss>;
534 compatible = "ti,am654-mailbox";
536 #mbox-cells = <1>;
537 ti,mbox-num-users = <4>;
538 ti,mbox-num-fifos = <16>;
539 interrupt-parent = <&intr_main_navss>;
543 compatible = "ti,am654-mailbox";
545 #mbox-cells = <1>;
546 ti,mbox-num-users = <4>;
547 ti,mbox-num-fifos = <16>;
548 interrupt-parent = <&intr_main_navss>;
552 compatible = "ti,am654-mailbox";
554 #mbox-cells = <1>;
555 ti,mbox-num-users = <4>;
556 ti,mbox-num-fifos = <16>;
557 interrupt-parent = <&intr_main_navss>;
561 compatible = "ti,am654-mailbox";
563 #mbox-cells = <1>;
564 ti,mbox-num-users = <4>;
565 ti,mbox-num-fifos = <16>;
566 interrupt-parent = <&intr_main_navss>;
570 compatible = "ti,am654-mailbox";
572 #mbox-cells = <1>;
573 ti,mbox-num-users = <4>;
574 ti,mbox-num-fifos = <16>;
575 interrupt-parent = <&intr_main_navss>;
579 compatible = "ti,am654-mailbox";
581 #mbox-cells = <1>;
582 ti,mbox-num-users = <4>;
583 ti,mbox-num-fifos = <16>;
584 interrupt-parent = <&intr_main_navss>;
588 compatible = "ti,am654-mailbox";
590 #mbox-cells = <1>;
591 ti,mbox-num-users = <4>;
592 ti,mbox-num-fifos = <16>;
593 interrupt-parent = <&intr_main_navss>;
597 compatible = "ti,am654-mailbox";
599 #mbox-cells = <1>;
600 ti,mbox-num-users = <4>;
601 ti,mbox-num-fifos = <16>;
602 interrupt-parent = <&intr_main_navss>;
606 compatible = "ti,am654-navss-ringacc";
611 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
612 ti,num-rings = <818>;
613 ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
615 ti,sci-dev-id = <187>;
616 msi-parent = <&inta_main_udmass>;
619 main_udmap: dma-controller@31150000 {
620 compatible = "ti,am654-navss-main-udmap";
624 reg-names = "gcfg", "rchanrt", "tchanrt";
625 msi-parent = <&inta_main_udmass>;
626 #dma-cells = <1>;
629 ti,sci-dev-id = <188>;
632 ti,sci-rm-range-tchan = <0xf>, /* TX_HCHAN */
634 ti,sci-rm-range-rchan = <0xb>, /* RX_HCHAN */
636 ti,sci-rm-range-rflow = <0x0>; /* GP RFLOW */
640 compatible = "ti,am65-cpts";
642 reg-names = "cpts";
644 clock-names = "cpts";
645 interrupts-extended = <&intr_main_navss 391>;
646 interrupt-names = "cpts";
647 ti,cpts-periodic-outputs = <6>;
648 ti,cpts-ext-ts-inputs = <8>;
650 main_cpts_mux: refclk-mux {
651 #clock-cells = <0>;
656 assigned-clocks = <&main_cpts_mux>;
657 assigned-clock-parents = <&k3_clks 118 5>;
663 compatible = "ti,am654-gpio", "ti,keystone-gpio";
665 gpio-controller;
666 #gpio-cells = <2>;
667 interrupt-parent = <&intr_main_gpio>;
669 interrupt-controller;
670 #interrupt-cells = <2>;
672 ti,davinci-gpio-unbanked = <0>;
674 clock-names = "gpio";
678 compatible = "ti,am654-gpio", "ti,keystone-gpio";
680 gpio-controller;
681 #gpio-cells = <2>;
682 interrupt-parent = <&intr_main_gpio>;
684 interrupt-controller;
685 #interrupt-cells = <2>;
687 ti,davinci-gpio-unbanked = <0>;
689 clock-names = "gpio";
692 pcie0_rc: pcie@5500000 {
693 compatible = "ti,am654-pcie-rc";
695 reg-names = "app", "dbics", "config", "atu";
696 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
697 #address-cells = <3>;
698 #size-cells = <2>;
701 ti,syscon-pcie-id = <&pcie_devid>;
702 ti,syscon-pcie-mode = <&pcie0_mode>;
703 bus-range = <0x0 0xff>;
704 num-viewport = <16>;
705 max-link-speed = <2>;
706 dma-coherent;
708 msi-map = <0x0 &gic_its 0x0 0x10000>;
712 pcie0_ep: pcie-ep@5500000 {
713 compatible = "ti,am654-pcie-ep";
715 reg-names = "app", "dbics", "addr_space", "atu";
716 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
717 ti,syscon-pcie-mode = <&pcie0_mode>;
718 num-ib-windows = <16>;
719 num-ob-windows = <16>;
720 max-link-speed = <2>;
721 dma-coherent;
725 pcie1_rc: pcie@5600000 {
726 compatible = "ti,am654-pcie-rc";
728 reg-names = "app", "dbics", "config", "atu";
729 power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
730 #address-cells = <3>;
731 #size-cells = <2>;
734 ti,syscon-pcie-id = <&pcie_devid>;
735 ti,syscon-pcie-mode = <&pcie1_mode>;
736 bus-range = <0x0 0xff>;
737 num-viewport = <16>;
738 max-link-speed = <2>;
739 dma-coherent;
741 msi-map = <0x0 &gic_its 0x10000 0x10000>;
745 pcie1_ep: pcie-ep@5600000 {
746 compatible = "ti,am654-pcie-ep";
748 reg-names = "app", "dbics", "addr_space", "atu";
749 power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
750 ti,syscon-pcie-mode = <&pcie1_mode>;
751 num-ib-windows = <16>;
752 num-ob-windows = <16>;
753 max-link-speed = <2>;
754 dma-coherent;
759 compatible = "ti,am33xx-mcasp-audio";
762 reg-names = "mpu","dat";
765 interrupt-names = "tx", "rx";
768 dma-names = "tx", "rx";
771 clock-names = "fck";
772 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
776 compatible = "ti,am33xx-mcasp-audio";
779 reg-names = "mpu","dat";
782 interrupt-names = "tx", "rx";
785 dma-names = "tx", "rx";
788 clock-names = "fck";
789 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
793 compatible = "ti,am33xx-mcasp-audio";
796 reg-names = "mpu","dat";
799 interrupt-names = "tx", "rx";
802 dma-names = "tx", "rx";
805 clock-names = "fck";
806 power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
810 compatible = "ti,am654-cal";
813 reg-names = "cal_top",
816 ti,camerrx-control = <&scm_conf 0x40c0>;
817 clock-names = "fck";
819 power-domains = <&k3_pds 2 TI_SCI_PD_EXCLUSIVE>;
822 #address-cells = <1>;
823 #size-cells = <0>;
832 compatible = "ti,am65x-dss";
840 reg-names = "common", "vidl1", "vid",
843 ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
845 power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
850 clock-names = "fck", "vp1", "vp2";
854 * DIV1. See "Figure 12-3365. DSS Integration"
857 assigned-clocks = <&k3_clks 67 2>;
858 assigned-clock-parents = <&k3_clks 67 5>;
862 dma-coherent;
865 #address-cells = <1>;
866 #size-cells = <0>;
871 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
872 #pwm-cells = <3>;
874 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
876 clock-names = "tbclk", "fck";
880 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
881 #pwm-cells = <3>;
883 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
885 clock-names = "tbclk", "fck";
889 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
890 #pwm-cells = <3>;
892 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
894 clock-names = "tbclk", "fck";
898 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
899 #pwm-cells = <3>;
901 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
903 clock-names = "tbclk", "fck";
907 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
908 #pwm-cells = <3>;
910 power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>;
912 clock-names = "tbclk", "fck";
916 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
917 #pwm-cells = <3>;
919 power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>;
921 clock-names = "tbclk", "fck";
925 compatible = "ti,am654-icssg";
927 power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
928 #address-cells = <1>;
929 #size-cells = <1>;
936 reg-names = "dram0", "dram1",
941 compatible = "ti,pruss-cfg", "syscon";
943 #address-cells = <1>;
944 #size-cells = <1>;
948 #address-cells = <1>;
949 #size-cells = <0>;
951 icssg0_coreclk_mux: coreclk-mux@3c {
953 #clock-cells = <0>;
956 assigned-clocks = <&icssg0_coreclk_mux>;
957 assigned-clock-parents = <&k3_clks 62 3>;
960 icssg0_iepclk_mux: iepclk-mux@30 {
962 #clock-cells = <0>;
965 assigned-clocks = <&icssg0_iepclk_mux>;
966 assigned-clock-parents = <&icssg0_coreclk_mux>;
971 icssg0_mii_rt: mii-rt@32000 {
972 compatible = "ti,pruss-mii", "syscon";
976 icssg0_mii_g_rt: mii-g-rt@33000 {
977 compatible = "ti,pruss-mii-g", "syscon";
981 icssg0_intc: interrupt-controller@20000 {
982 compatible = "ti,icssg-intc";
984 interrupt-controller;
985 #interrupt-cells = <3>;
994 interrupt-names = "host_intr0", "host_intr1",
1001 compatible = "ti,am654-pru";
1005 reg-names = "iram", "control", "debug";
1006 firmware-name = "am65x-pru0_0-fw";
1010 compatible = "ti,am654-rtu";
1014 reg-names = "iram", "control", "debug";
1015 firmware-name = "am65x-rtu0_0-fw";
1019 compatible = "ti,am654-tx-pru";
1023 reg-names = "iram", "control", "debug";
1024 firmware-name = "am65x-txpru0_0-fw";
1028 compatible = "ti,am654-pru";
1032 reg-names = "iram", "control", "debug";
1033 firmware-name = "am65x-pru0_1-fw";
1037 compatible = "ti,am654-rtu";
1041 reg-names = "iram", "control", "debug";
1042 firmware-name = "am65x-rtu0_1-fw";
1046 compatible = "ti,am654-tx-pru";
1050 reg-names = "iram", "control", "debug";
1051 firmware-name = "am65x-txpru0_1-fw";
1058 clock-names = "fck";
1059 #address-cells = <1>;
1060 #size-cells = <0>;
1066 compatible = "ti,am654-icssg";
1068 power-domains = <&k3_pds 63 TI_SCI_PD_EXCLUSIVE>;
1069 #address-cells = <1>;
1070 #size-cells = <1>;
1077 reg-names = "dram0", "dram1",
1082 compatible = "ti,pruss-cfg", "syscon";
1084 #address-cells = <1>;
1085 #size-cells = <1>;
1089 #address-cells = <1>;
1090 #size-cells = <0>;
1092 icssg1_coreclk_mux: coreclk-mux@3c {
1094 #clock-cells = <0>;
1097 assigned-clocks = <&icssg1_coreclk_mux>;
1098 assigned-clock-parents = <&k3_clks 63 3>;
1101 icssg1_iepclk_mux: iepclk-mux@30 {
1103 #clock-cells = <0>;
1106 assigned-clocks = <&icssg1_iepclk_mux>;
1107 assigned-clock-parents = <&icssg1_coreclk_mux>;
1112 icssg1_mii_rt: mii-rt@32000 {
1113 compatible = "ti,pruss-mii", "syscon";
1117 icssg1_mii_g_rt: mii-g-rt@33000 {
1118 compatible = "ti,pruss-mii-g", "syscon";
1122 icssg1_intc: interrupt-controller@20000 {
1123 compatible = "ti,icssg-intc";
1125 interrupt-controller;
1126 #interrupt-cells = <3>;
1135 interrupt-names = "host_intr0", "host_intr1",
1142 compatible = "ti,am654-pru";
1146 reg-names = "iram", "control", "debug";
1147 firmware-name = "am65x-pru1_0-fw";
1151 compatible = "ti,am654-rtu";
1155 reg-names = "iram", "control", "debug";
1156 firmware-name = "am65x-rtu1_0-fw";
1160 compatible = "ti,am654-tx-pru";
1164 reg-names = "iram", "control", "debug";
1165 firmware-name = "am65x-txpru1_0-fw";
1169 compatible = "ti,am654-pru";
1173 reg-names = "iram", "control", "debug";
1174 firmware-name = "am65x-pru1_1-fw";
1178 compatible = "ti,am654-rtu";
1182 reg-names = "iram", "control", "debug";
1183 firmware-name = "am65x-rtu1_1-fw";
1187 compatible = "ti,am654-tx-pru";
1191 reg-names = "iram", "control", "debug";
1192 firmware-name = "am65x-txpru1_1-fw";
1199 clock-names = "fck";
1200 #address-cells = <1>;
1201 #size-cells = <0>;
1207 compatible = "ti,am654-icssg";
1209 power-domains = <&k3_pds 64 TI_SCI_PD_EXCLUSIVE>;
1210 #address-cells = <1>;
1211 #size-cells = <1>;
1218 reg-names = "dram0", "dram1",
1223 compatible = "ti,pruss-cfg", "syscon";
1225 #address-cells = <1>;
1226 #size-cells = <1>;
1230 #address-cells = <1>;
1231 #size-cells = <0>;
1233 icssg2_coreclk_mux: coreclk-mux@3c {
1235 #clock-cells = <0>;
1238 assigned-clocks = <&icssg2_coreclk_mux>;
1239 assigned-clock-parents = <&k3_clks 64 3>;
1242 icssg2_iepclk_mux: iepclk-mux@30 {
1244 #clock-cells = <0>;
1247 assigned-clocks = <&icssg2_iepclk_mux>;
1248 assigned-clock-parents = <&icssg2_coreclk_mux>;
1253 icssg2_mii_rt: mii-rt@32000 {
1254 compatible = "ti,pruss-mii", "syscon";
1258 icssg2_mii_g_rt: mii-g-rt@33000 {
1259 compatible = "ti,pruss-mii-g", "syscon";
1263 icssg2_intc: interrupt-controller@20000 {
1264 compatible = "ti,icssg-intc";
1266 interrupt-controller;
1267 #interrupt-cells = <3>;
1276 interrupt-names = "host_intr0", "host_intr1",
1283 compatible = "ti,am654-pru";
1287 reg-names = "iram", "control", "debug";
1288 firmware-name = "am65x-pru2_0-fw";
1292 compatible = "ti,am654-rtu";
1296 reg-names = "iram", "control", "debug";
1297 firmware-name = "am65x-rtu2_0-fw";
1301 compatible = "ti,am654-tx-pru";
1305 reg-names = "iram", "control", "debug";
1306 firmware-name = "am65x-txpru2_0-fw";
1310 compatible = "ti,am654-pru";
1314 reg-names = "iram", "control", "debug";
1315 firmware-name = "am65x-pru2_1-fw";
1319 compatible = "ti,am654-rtu";
1323 reg-names = "iram", "control", "debug";
1324 firmware-name = "am65x-rtu2_1-fw";
1328 compatible = "ti,am654-tx-pru";
1332 reg-names = "iram", "control", "debug";
1333 firmware-name = "am65x-txpru2_1-fw";
1340 clock-names = "fck";
1341 #address-cells = <1>;
1342 #size-cells = <0>;