Lines Matching +full:synquacer +full:- +full:pre +full:- +full:its
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
24 #size-cells = <1>;
27 tfa-sram@1c0000 {
31 dmsc-sram@1e0000 {
35 sproxy-sram@1fc000 {
41 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
43 #address-cells = <1>;
44 #size-cells = <1>;
47 serdes_ln_ctrl: mux-controller {
48 compatible = "mmio-mux";
49 #mux-control-cells = <1>;
50 mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */
54 gic500: interrupt-controller@1800000 {
55 compatible = "arm,gic-v3";
56 #address-cells = <2>;
57 #size-cells = <2>;
59 #interrupt-cells = <3>;
60 interrupt-controller;
72 gic_its: msi-controller@1820000 {
73 compatible = "arm,gic-v3-its";
75 socionext,synquacer-pre-its = <0x1000000 0x400000>;
76 msi-controller;
77 #msi-cells = <1>;
82 compatible = "simple-mfd";
83 #address-cells = <2>;
84 #size-cells = <2>;
85 dma-ranges;
88 ti,sci-dev-id = <25>;
91 compatible = "ti,am654-secure-proxy";
92 #mbox-cells = <1>;
93 reg-names = "target_data", "rt", "scfg";
97 interrupt-names = "rx_012";
101 inta_main_dmss: interrupt-controller@48000000 {
102 compatible = "ti,sci-inta";
104 #interrupt-cells = <0>;
105 interrupt-controller;
106 interrupt-parent = <&gic500>;
107 msi-controller;
109 ti,sci-dev-id = <28>;
110 ti,interrupt-ranges = <4 68 36>;
111 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
114 main_bcdma: dma-controller@485c0100 {
115 compatible = "ti,am64-dmss-bcdma";
121 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
122 msi-parent = <&inta_main_dmss>;
123 #dma-cells = <3>;
126 ti,sci-dev-id = <26>;
127 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
128 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
129 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
132 main_pktdma: dma-controller@485c0000 {
133 compatible = "ti,am64-dmss-pktdma";
138 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
139 msi-parent = <&inta_main_dmss>;
140 #dma-cells = <2>;
143 ti,sci-dev-id = <30>;
144 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
150 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
156 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
164 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
173 dmsc: system-controller@44043000 {
174 compatible = "ti,k2g-sci";
175 ti,host-id = <12>;
176 mbox-names = "rx", "tx";
179 reg-names = "debug_messages";
182 k3_pds: power-controller {
183 compatible = "ti,sci-pm-domain";
184 #power-domain-cells = <2>;
187 k3_clks: clock-controller {
188 compatible = "ti,k2g-sci-clk";
189 #clock-cells = <2>;
192 k3_reset: reset-controller {
193 compatible = "ti,sci-reset";
194 #reset-cells = <2>;
199 compatible = "pinctrl-single";
201 #pinctrl-cells = <1>;
202 pinctrl-single,register-width = <32>;
203 pinctrl-single,function-mask = <0xffffffff>;
207 compatible = "syscon", "simple-mfd";
209 #address-cells = <1>;
210 #size-cells = <1>;
214 compatible = "ti,am654-chipid";
219 compatible = "ti,am654-phy-gmii-sel";
221 #phy-cells = <1>;
225 compatible = "ti,am64-epwm-tbclk", "syscon";
227 #clock-cells = <1>;
232 compatible = "ti,am64-uart", "ti,am654-uart";
235 clock-frequency = <48000000>;
236 current-speed = <115200>;
237 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
239 clock-names = "fclk";
243 compatible = "ti,am64-uart", "ti,am654-uart";
246 clock-frequency = <48000000>;
247 current-speed = <115200>;
248 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
250 clock-names = "fclk";
254 compatible = "ti,am64-uart", "ti,am654-uart";
257 clock-frequency = <48000000>;
258 current-speed = <115200>;
259 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
261 clock-names = "fclk";
265 compatible = "ti,am64-uart", "ti,am654-uart";
268 clock-frequency = <48000000>;
269 current-speed = <115200>;
270 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
272 clock-names = "fclk";
276 compatible = "ti,am64-uart", "ti,am654-uart";
279 clock-frequency = <48000000>;
280 current-speed = <115200>;
281 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
283 clock-names = "fclk";
287 compatible = "ti,am64-uart", "ti,am654-uart";
290 clock-frequency = <48000000>;
291 current-speed = <115200>;
292 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
294 clock-names = "fclk";
298 compatible = "ti,am64-uart", "ti,am654-uart";
301 clock-frequency = <48000000>;
302 current-speed = <115200>;
303 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
305 clock-names = "fclk";
309 compatible = "ti,am64-i2c", "ti,omap4-i2c";
312 #address-cells = <1>;
313 #size-cells = <0>;
314 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
316 clock-names = "fck";
320 compatible = "ti,am64-i2c", "ti,omap4-i2c";
323 #address-cells = <1>;
324 #size-cells = <0>;
325 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
327 clock-names = "fck";
331 compatible = "ti,am64-i2c", "ti,omap4-i2c";
334 #address-cells = <1>;
335 #size-cells = <0>;
336 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
338 clock-names = "fck";
342 compatible = "ti,am64-i2c", "ti,omap4-i2c";
345 #address-cells = <1>;
346 #size-cells = <0>;
347 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
349 clock-names = "fck";
353 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
356 #address-cells = <1>;
357 #size-cells = <0>;
358 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
361 dma-names = "tx0", "rx0";
365 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
368 #address-cells = <1>;
369 #size-cells = <0>;
370 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
375 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
378 #address-cells = <1>;
379 #size-cells = <0>;
380 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
385 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
388 #address-cells = <1>;
389 #size-cells = <0>;
390 power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
395 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
398 #address-cells = <1>;
399 #size-cells = <0>;
400 power-domains = <&k3_pds 145 TI_SCI_PD_EXCLUSIVE>;
404 main_gpio_intr: interrupt-controller@a00000 {
405 compatible = "ti,sci-intr";
407 ti,intr-trigger-type = <1>;
408 interrupt-controller;
409 interrupt-parent = <&gic500>;
410 #interrupt-cells = <1>;
412 ti,sci-dev-id = <3>;
413 ti,interrupt-ranges = <0 32 16>;
417 compatible = "ti,am64-gpio", "ti,keystone-gpio";
419 gpio-controller;
420 #gpio-cells = <2>;
421 interrupt-parent = <&main_gpio_intr>;
424 interrupt-controller;
425 #interrupt-cells = <2>;
427 ti,davinci-gpio-unbanked = <0>;
428 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
430 clock-names = "gpio";
434 compatible = "ti,am64-gpio", "ti,keystone-gpio";
436 gpio-controller;
437 #gpio-cells = <2>;
438 interrupt-parent = <&main_gpio_intr>;
441 interrupt-controller;
442 #interrupt-cells = <2>;
444 ti,davinci-gpio-unbanked = <0>;
445 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
447 clock-names = "gpio";
451 compatible = "ti,am64-sdhci-8bit";
454 power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
456 clock-names = "clk_ahb", "clk_xin";
457 mmc-ddr-1_8v;
458 mmc-hs200-1_8v;
459 ti,trm-icp = <0x2>;
460 ti,otap-del-sel-legacy = <0x0>;
461 ti,otap-del-sel-mmc-hs = <0x0>;
462 ti,otap-del-sel-ddr52 = <0x6>;
463 ti,otap-del-sel-hs200 = <0x7>;
467 compatible = "ti,am64-sdhci-4bit";
470 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
472 clock-names = "clk_ahb", "clk_xin";
473 ti,trm-icp = <0x2>;
474 ti,otap-del-sel-legacy = <0x0>;
475 ti,otap-del-sel-sd-hs = <0xf>;
476 ti,otap-del-sel-sdr12 = <0xf>;
477 ti,otap-del-sel-sdr25 = <0xf>;
478 ti,otap-del-sel-sdr50 = <0xc>;
479 ti,otap-del-sel-sdr104 = <0x6>;
480 ti,otap-del-sel-ddr50 = <0x9>;
481 ti,clkbuf-sel = <0x7>;
485 compatible = "ti,am642-cpsw-nuss";
486 #address-cells = <2>;
487 #size-cells = <2>;
489 reg-names = "cpsw_nuss";
492 assigned-clocks = <&k3_clks 13 1>;
493 assigned-clock-parents = <&k3_clks 13 9>;
494 clock-names = "fck";
495 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
506 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
509 ethernet-ports {
510 #address-cells = <1>;
511 #size-cells = <0>;
515 ti,mac-only;
518 mac-address = [00 00 00 00 00 00];
519 ti,syscon-efuse = <&main_conf 0x200>;
524 ti,mac-only;
527 mac-address = [00 00 00 00 00 00];
532 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
534 #address-cells = <1>;
535 #size-cells = <0>;
537 clock-names = "fck";
542 compatible = "ti,j721e-cpts";
545 clock-names = "cpts";
546 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
547 interrupt-names = "cpts";
548 ti,cpts-ext-ts-inputs = <4>;
549 ti,cpts-periodic-outputs = <2>;
554 compatible = "ti,j721e-cpts";
556 reg-names = "cpts";
557 power-domains = <&k3_pds 84 TI_SCI_PD_EXCLUSIVE>;
559 clock-names = "cpts";
560 assigned-clocks = <&k3_clks 84 0>;
561 assigned-clock-parents = <&k3_clks 84 8>;
563 interrupt-names = "cpts";
564 ti,cpts-periodic-outputs = <6>;
565 ti,cpts-ext-ts-inputs = <8>;
569 compatible = "pinctrl-single";
571 #pinctrl-cells = <1>;
572 pinctrl-single,register-width = <32>;
573 pinctrl-single,function-mask = <0x000107ff>;
576 usbss0: cdns-usb@f900000{
577 compatible = "ti,am64-usb";
579 power-domains = <&k3_pds 161 TI_SCI_PD_EXCLUSIVE>;
581 clock-names = "ref", "lpm";
582 assigned-clocks = <&k3_clks 161 9>; /* USB2_REFCLK */
583 assigned-clock-parents = <&k3_clks 161 10>; /* HF0SC0 */
584 #address-cells = <2>;
585 #size-cells = <2>;
592 reg-names = "otg",
598 interrupt-names = "host",
601 maximum-speed = "super-speed";
607 compatible = "ti,am654-tscadc", "ti,am3359-tscadc";
610 power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>;
612 assigned-clocks = <&k3_clks 0 0>;
613 assigned-clock-parents = <&k3_clks 0 3>;
614 assigned-clock-rates = <60000000>;
615 clock-names = "adc_tsc_fck";
618 #io-channel-cells = <1>;
619 compatible = "ti,am654-adc", "ti,am3359-adc";
624 compatible = "simple-bus";
626 #address-cells = <2>;
627 #size-cells = <2>;
631 compatible = "ti,am654-ospi", "cdns,qspi-nor";
635 cdns,fifo-depth = <256>;
636 cdns,fifo-width = <4>;
637 cdns,trigger-address = <0x0>;
638 #address-cells = <0x1>;
639 #size-cells = <0x0>;
641 assigned-clocks = <&k3_clks 75 6>;
642 assigned-clock-parents = <&k3_clks 75 7>;
643 assigned-clock-rates = <166666666>;
644 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
649 compatible = "ti,am64-hwspinlock";
651 #hwlock-cells = <1>;
655 compatible = "ti,am64-mailbox";
659 #mbox-cells = <1>;
660 ti,mbox-num-users = <4>;
661 ti,mbox-num-fifos = <16>;
665 compatible = "ti,am64-mailbox";
669 #mbox-cells = <1>;
670 ti,mbox-num-users = <4>;
671 ti,mbox-num-fifos = <16>;
675 compatible = "ti,am64-mailbox";
679 #mbox-cells = <1>;
680 ti,mbox-num-users = <4>;
681 ti,mbox-num-fifos = <16>;
685 compatible = "ti,am64-mailbox";
689 #mbox-cells = <1>;
690 ti,mbox-num-users = <4>;
691 ti,mbox-num-fifos = <16>;
695 compatible = "ti,am64-mailbox";
698 #mbox-cells = <1>;
699 ti,mbox-num-users = <4>;
700 ti,mbox-num-fifos = <16>;
704 compatible = "ti,am64-mailbox";
707 #mbox-cells = <1>;
708 ti,mbox-num-users = <4>;
709 ti,mbox-num-fifos = <16>;
713 compatible = "ti,am64-r5fss";
714 ti,cluster-mode = <0>;
715 #address-cells = <1>;
716 #size-cells = <1>;
721 power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
724 compatible = "ti,am64-r5f";
727 reg-names = "atcm", "btcm";
729 ti,sci-dev-id = <121>;
730 ti,sci-proc-ids = <0x01 0xff>;
732 firmware-name = "am64-main-r5f0_0-fw";
733 ti,atcm-enable = <1>;
734 ti,btcm-enable = <1>;
739 compatible = "ti,am64-r5f";
742 reg-names = "atcm", "btcm";
744 ti,sci-dev-id = <122>;
745 ti,sci-proc-ids = <0x02 0xff>;
747 firmware-name = "am64-main-r5f0_1-fw";
748 ti,atcm-enable = <1>;
749 ti,btcm-enable = <1>;
755 compatible = "ti,am64-r5fss";
756 ti,cluster-mode = <0>;
757 #address-cells = <1>;
758 #size-cells = <1>;
763 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
766 compatible = "ti,am64-r5f";
769 reg-names = "atcm", "btcm";
771 ti,sci-dev-id = <123>;
772 ti,sci-proc-ids = <0x06 0xff>;
774 firmware-name = "am64-main-r5f1_0-fw";
775 ti,atcm-enable = <1>;
776 ti,btcm-enable = <1>;
781 compatible = "ti,am64-r5f";
784 reg-names = "atcm", "btcm";
786 ti,sci-dev-id = <124>;
787 ti,sci-proc-ids = <0x07 0xff>;
789 firmware-name = "am64-main-r5f1_1-fw";
790 ti,atcm-enable = <1>;
791 ti,btcm-enable = <1>;
797 compatible = "ti,am64-wiz-10g";
798 #address-cells = <1>;
799 #size-cells = <1>;
800 power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>;
802 clock-names = "fck", "core_ref_clk", "ext_ref_clk";
803 num-lanes = <1>;
804 #reset-cells = <1>;
805 #clock-cells = <1>;
808 assigned-clocks = <&k3_clks 162 1>;
809 assigned-clock-parents = <&k3_clks 162 5>;
812 compatible = "ti,j721e-serdes-10g";
814 reg-names = "torrent_phy";
816 reset-names = "torrent_reset";
819 clock-names = "refclk", "phy_en_refclk";
820 assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>,
823 assigned-clock-parents = <&k3_clks 162 1>,
826 #address-cells = <1>;
827 #size-cells = <0>;
828 #clock-cells = <1>;
833 compatible = "ti,am64-pcie-host", "ti,j721e-pcie-host";
838 reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
839 interrupt-names = "link_state";
842 ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
843 max-link-speed = <2>;
844 num-lanes = <1>;
845 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
847 clock-names = "fck", "pcie_refclk";
848 #address-cells = <3>;
849 #size-cells = <2>;
850 bus-range = <0x0 0xff>;
851 cdns,no-bar-match-nbits = <64>;
852 vendor-id = <0x104c>;
853 device-id = <0xb010>;
854 msi-map = <0x0 &gic_its 0x0 0x10000>;
857 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x00000010 0x0>;
860 pcie0_ep: pcie-ep@f102000 {
861 compatible = "ti,am64-pcie-ep", "ti,j721e-pcie-ep";
866 reg-names = "intd_cfg", "user_cfg", "reg", "mem";
867 interrupt-names = "link_state";
869 ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
870 max-link-speed = <2>;
871 num-lanes = <1>;
872 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
874 clock-names = "fck";
875 max-functions = /bits/ 8 <1>;
879 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
880 #pwm-cells = <3>;
882 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
884 clock-names = "tbclk", "fck";
888 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
889 #pwm-cells = <3>;
891 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
893 clock-names = "tbclk", "fck";
897 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
898 #pwm-cells = <3>;
900 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
902 clock-names = "tbclk", "fck";
906 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
907 #pwm-cells = <3>;
909 power-domains = <&k3_pds 89 TI_SCI_PD_EXCLUSIVE>;
911 clock-names = "tbclk", "fck";
915 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
916 #pwm-cells = <3>;
918 power-domains = <&k3_pds 90 TI_SCI_PD_EXCLUSIVE>;
920 clock-names = "tbclk", "fck";
924 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
925 #pwm-cells = <3>;
927 power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
929 clock-names = "tbclk", "fck";
933 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
934 #pwm-cells = <3>;
936 power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>;
938 clock-names = "tbclk", "fck";
942 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
943 #pwm-cells = <3>;
945 power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>;
947 clock-names = "tbclk", "fck";
951 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
952 #pwm-cells = <3>;
954 power-domains = <&k3_pds 94 TI_SCI_PD_EXCLUSIVE>;
956 clock-names = "tbclk", "fck";
960 compatible = "ti,am64-ecap", "ti,am3352-ecap";
961 #pwm-cells = <3>;
963 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
965 clock-names = "fck";
969 compatible = "ti,am64-ecap", "ti,am3352-ecap";
970 #pwm-cells = <3>;
972 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
974 clock-names = "fck";
978 compatible = "ti,am64-ecap", "ti,am3352-ecap";
979 #pwm-cells = <3>;
981 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
983 clock-names = "fck";
987 compatible = "ti,j7-rti-wdt";
990 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
991 assigned-clocks = <&k3_clks 125 0>;
992 assigned-clock-parents = <&k3_clks 125 2>;
996 compatible = "ti,j7-rti-wdt";
999 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
1000 assigned-clocks = <&k3_clks 126 0>;
1001 assigned-clock-parents = <&k3_clks 126 2>;
1005 compatible = "ti,am642-icssg";
1007 power-domains = <&k3_pds 81 TI_SCI_PD_EXCLUSIVE>;
1008 #address-cells = <1>;
1009 #size-cells = <1>;
1016 reg-names = "dram0", "dram1", "shrdram2";
1020 compatible = "ti,pruss-cfg", "syscon";
1022 #address-cells = <1>;
1023 #size-cells = <1>;
1027 #address-cells = <1>;
1028 #size-cells = <0>;
1030 icssg0_coreclk_mux: coreclk-mux@3c {
1032 #clock-cells = <0>;
1035 assigned-clocks = <&icssg0_coreclk_mux>;
1036 assigned-clock-parents = <&k3_clks 81 20>;
1039 icssg0_iepclk_mux: iepclk-mux@30 {
1041 #clock-cells = <0>;
1044 assigned-clocks = <&icssg0_iepclk_mux>;
1045 assigned-clock-parents = <&icssg0_coreclk_mux>;
1050 icssg0_mii_rt: mii-rt@32000 {
1051 compatible = "ti,pruss-mii", "syscon";
1055 icssg0_mii_g_rt: mii-g-rt@33000 {
1056 compatible = "ti,pruss-mii-g", "syscon";
1060 icssg0_intc: interrupt-controller@20000 {
1061 compatible = "ti,icssg-intc";
1063 interrupt-controller;
1064 #interrupt-cells = <3>;
1073 interrupt-names = "host_intr0", "host_intr1",
1080 compatible = "ti,am642-pru";
1084 reg-names = "iram", "control", "debug";
1085 firmware-name = "am64x-pru0_0-fw";
1089 compatible = "ti,am642-rtu";
1093 reg-names = "iram", "control", "debug";
1094 firmware-name = "am64x-rtu0_0-fw";
1098 compatible = "ti,am642-tx-pru";
1102 reg-names = "iram", "control", "debug";
1103 firmware-name = "am64x-txpru0_0-fw";
1107 compatible = "ti,am642-pru";
1111 reg-names = "iram", "control", "debug";
1112 firmware-name = "am64x-pru0_1-fw";
1116 compatible = "ti,am642-rtu";
1120 reg-names = "iram", "control", "debug";
1121 firmware-name = "am64x-rtu0_1-fw";
1125 compatible = "ti,am642-tx-pru";
1129 reg-names = "iram", "control", "debug";
1130 firmware-name = "am64x-txpru0_1-fw";
1137 clock-names = "fck";
1138 #address-cells = <1>;
1139 #size-cells = <0>;
1145 compatible = "ti,am642-icssg";
1147 power-domains = <&k3_pds 82 TI_SCI_PD_EXCLUSIVE>;
1148 #address-cells = <1>;
1149 #size-cells = <1>;
1156 reg-names = "dram0", "dram1", "shrdram2";
1160 compatible = "ti,pruss-cfg", "syscon";
1162 #address-cells = <1>;
1163 #size-cells = <1>;
1167 #address-cells = <1>;
1168 #size-cells = <0>;
1170 icssg1_coreclk_mux: coreclk-mux@3c {
1172 #clock-cells = <0>;
1175 assigned-clocks = <&icssg1_coreclk_mux>;
1176 assigned-clock-parents = <&k3_clks 82 20>;
1179 icssg1_iepclk_mux: iepclk-mux@30 {
1181 #clock-cells = <0>;
1184 assigned-clocks = <&icssg1_iepclk_mux>;
1185 assigned-clock-parents = <&icssg1_coreclk_mux>;
1190 icssg1_mii_rt: mii-rt@32000 {
1191 compatible = "ti,pruss-mii", "syscon";
1195 icssg1_mii_g_rt: mii-g-rt@33000 {
1196 compatible = "ti,pruss-mii-g", "syscon";
1200 icssg1_intc: interrupt-controller@20000 {
1201 compatible = "ti,icssg-intc";
1203 interrupt-controller;
1204 #interrupt-cells = <3>;
1213 interrupt-names = "host_intr0", "host_intr1",
1220 compatible = "ti,am642-pru";
1224 reg-names = "iram", "control", "debug";
1225 firmware-name = "am64x-pru1_0-fw";
1229 compatible = "ti,am642-rtu";
1233 reg-names = "iram", "control", "debug";
1234 firmware-name = "am64x-rtu1_0-fw";
1238 compatible = "ti,am642-tx-pru";
1242 reg-names = "iram", "control", "debug";
1243 firmware-name = "am64x-txpru1_0-fw";
1247 compatible = "ti,am642-pru";
1251 reg-names = "iram", "control", "debug";
1252 firmware-name = "am64x-pru1_1-fw";
1256 compatible = "ti,am642-rtu";
1260 reg-names = "iram", "control", "debug";
1261 firmware-name = "am64x-rtu1_1-fw";
1265 compatible = "ti,am642-tx-pru";
1269 reg-names = "iram", "control", "debug";
1270 firmware-name = "am64x-txpru1_1-fw";
1276 #address-cells = <1>;
1277 #size-cells = <0>;
1279 clock-names = "fck";
1288 reg-names = "m_can", "message_ram";
1289 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
1291 clock-names = "hclk", "cclk";
1294 interrupt-names = "int0", "int1";
1295 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
1302 reg-names = "m_can", "message_ram";
1303 power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>;
1305 clock-names = "hclk", "cclk";
1308 interrupt-names = "int0", "int1";
1309 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
1313 compatible = "ti,am64-sa2ul";
1315 power-domains = <&k3_pds 133 TI_SCI_PD_SHARED>;
1316 #address-cells = <2>;
1317 #size-cells = <2>;
1321 dma-names = "tx", "rx1", "rx2";
1324 compatible = "inside-secure,safexcel-eip76";
1328 status = "disabled"; /* Used by OP-TEE */
1332 gpmc0: memory-controller@3b000000 {
1333 compatible = "ti,am64-gpmc";
1334 power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
1336 clock-names = "fck";
1339 reg-names = "cfg", "data";
1341 gpmc,num-cs = <3>;
1342 gpmc,num-waitpins = <2>;
1343 #address-cells = <2>;
1344 #size-cells = <1>;
1345 interrupt-controller;
1346 #interrupt-cells = <2>;
1347 gpio-controller;
1348 #gpio-cells = <2>;
1352 compatible = "ti,am64-elm";
1355 power-domains = <&k3_pds 54 TI_SCI_PD_EXCLUSIVE>;
1357 clock-names = "fck";