Lines Matching +full:0 +full:x8000

17 		#size-cells = <0>;
39 		cpu0: cpu@0 {
41 			reg = <0x000>;
44 			i-cache-size = <0x8000>;
47 			d-cache-size = <0x8000>;
55 			reg = <0x001>;
58 			i-cache-size = <0x8000>;
61 			d-cache-size = <0x8000>;
69 			reg = <0x002>;
72 			i-cache-size = <0x8000>;
75 			d-cache-size = <0x8000>;
83 			reg = <0x003>;
86 			i-cache-size = <0x8000>;
89 			d-cache-size = <0x8000>;
99 		cache-size = <0x40000>;