Lines Matching +full:synquacer +full:- +full:pre +full:- +full:its
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
25 #address-cells = <2>;
26 #size-cells = <2>;
28 #interrupt-cells = <3>;
29 interrupt-controller;
36 gic_its: msi-controller@1820000 {
37 compatible = "arm,gic-v3-its";
39 socionext,synquacer-pre-its = <0x1000000 0x400000>;
40 msi-controller;
41 #msi-cells = <1>;
46 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
48 #address-cells = <1>;
49 #size-cells = <1>;
54 compatible = "simple-bus";
55 #address-cells = <2>;
56 #size-cells = <2>;
57 dma-ranges;
60 ti,sci-dev-id = <25>;
63 compatible = "ti,am654-secure-proxy";
67 reg-names = "target_data", "rt", "scfg";
68 #mbox-cells = <1>;
69 interrupt-names = "rx_012";
74 dmsc: system-controller@44043000 {
75 compatible = "ti,k2g-sci";
77 reg-names = "debug_messages";
78 ti,host-id = <12>;
79 mbox-names = "rx", "tx";
83 k3_pds: power-controller {
84 compatible = "ti,sci-pm-domain";
85 #power-domain-cells = <2>;
88 k3_clks: clock-controller {
89 compatible = "ti,k2g-sci-clk";
90 #clock-cells = <2>;
93 k3_reset: reset-controller {
94 compatible = "ti,sci-reset";
95 #reset-cells = <2>;
100 compatible = "pinctrl-single";
102 #pinctrl-cells = <1>;
103 pinctrl-single,register-width = <32>;
104 pinctrl-single,function-mask = <0xffffffff>;
108 compatible = "ti,am64-uart", "ti,am654-uart";
111 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
113 clock-names = "fclk";
118 compatible = "ti,am64-uart", "ti,am654-uart";
121 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
123 clock-names = "fclk";
128 compatible = "ti,am64-uart", "ti,am654-uart";
131 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
133 clock-names = "fclk";
138 compatible = "ti,am64-uart", "ti,am654-uart";
141 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
143 clock-names = "fclk";
148 compatible = "ti,am64-uart", "ti,am654-uart";
151 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
153 clock-names = "fclk";
158 compatible = "ti,am64-uart", "ti,am654-uart";
161 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
163 clock-names = "fclk";
168 compatible = "ti,am64-uart", "ti,am654-uart";
171 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
173 clock-names = "fclk";
178 compatible = "ti,am64-i2c", "ti,omap4-i2c";
181 #address-cells = <1>;
182 #size-cells = <0>;
183 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
185 clock-names = "fck";
190 compatible = "ti,am64-i2c", "ti,omap4-i2c";
193 #address-cells = <1>;
194 #size-cells = <0>;
195 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
197 clock-names = "fck";
202 compatible = "ti,am64-i2c", "ti,omap4-i2c";
205 #address-cells = <1>;
206 #size-cells = <0>;
207 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
209 clock-names = "fck";
214 compatible = "ti,am64-i2c", "ti,omap4-i2c";
217 #address-cells = <1>;
218 #size-cells = <0>;
219 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
221 clock-names = "fck";
225 main_gpio_intr: interrupt-controller@a00000 {
226 compatible = "ti,sci-intr";
228 ti,intr-trigger-type = <1>;
229 interrupt-controller;
230 interrupt-parent = <&gic500>;
231 #interrupt-cells = <1>;
233 ti,sci-dev-id = <3>;
234 ti,interrupt-ranges = <0 32 16>;
239 compatible = "ti,am64-gpio", "ti,keystone-gpio";
241 gpio-controller;
242 #gpio-cells = <2>;
243 interrupt-parent = <&main_gpio_intr>;
246 interrupt-controller;
247 #interrupt-cells = <2>;
249 ti,davinci-gpio-unbanked = <0>;
250 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
252 clock-names = "gpio";
257 compatible = "ti,am64-gpio", "ti,keystone-gpio";
259 gpio-controller;
260 #gpio-cells = <2>;
261 interrupt-parent = <&main_gpio_intr>;
264 interrupt-controller;
265 #interrupt-cells = <2>;
267 ti,davinci-gpio-unbanked = <0>;
268 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
270 clock-names = "gpio";
275 compatible = "ti,am62-sdhci";
278 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
280 clock-names = "clk_ahb", "clk_xin";
281 ti,trm-icp = <0x2>;
282 ti,otap-del-sel-legacy = <0x0>;
283 ti,otap-del-sel-sd-hs = <0x0>;
284 ti,otap-del-sel-sdr12 = <0xf>;
285 ti,otap-del-sel-sdr25 = <0xf>;
286 ti,otap-del-sel-sdr50 = <0xc>;
287 ti,otap-del-sel-sdr104 = <0x6>;
288 ti,otap-del-sel-ddr50 = <0x9>;
289 ti,itap-del-sel-legacy = <0x0>;
290 ti,itap-del-sel-sd-hs = <0x0>;
291 ti,itap-del-sel-sdr12 = <0x0>;
292 ti,itap-del-sel-sdr25 = <0x0>;
293 ti,clkbuf-sel = <0x7>;
294 bus-width = <4>;
295 no-1-8-v;