Lines Matching +full:0 +full:x11400000
39 #size-cells = <0>;
88 /* Cluster 0 */
89 cpucl0_0: cpu@0 {
92 reg = <0x0 0x000>;
96 i-cache-size = <0xc000>;
99 d-cache-size = <0x8000>;
108 reg = <0x0 0x001>;
112 i-cache-size = <0xc000>;
115 d-cache-size = <0x8000>;
124 reg = <0x0 0x002>;
128 i-cache-size = <0xc000>;
131 d-cache-size = <0x8000>;
140 reg = <0x0 0x003>;
143 i-cache-size = <0xc000>;
146 d-cache-size = <0x8000>;
156 reg = <0x0 0x100>;
160 i-cache-size = <0xc000>;
163 d-cache-size = <0x8000>;
172 reg = <0x0 0x101>;
176 i-cache-size = <0xc000>;
179 d-cache-size = <0x8000>;
188 reg = <0x0 0x102>;
192 i-cache-size = <0xc000>;
195 d-cache-size = <0x8000>;
204 reg = <0x0 0x103>;
208 i-cache-size = <0xc000>;
211 d-cache-size = <0x8000>;
221 reg = <0x0 0x200>;
225 i-cache-size = <0xc000>;
228 d-cache-size = <0x8000>;
237 reg = <0x0 0x201>;
241 i-cache-size = <0xc000>;
244 d-cache-size = <0x8000>;
253 reg = <0x0 0x202>;
257 i-cache-size = <0xc000>;
260 d-cache-size = <0x8000>;
269 reg = <0x0 0x203>;
273 i-cache-size = <0xc000>;
276 d-cache-size = <0x8000>;
284 cache-size = <0x400000>;
296 arm,psci-suspend-param = <0x0010000>;
340 #clock-cells = <0>;
343 soc: soc@0 {
347 ranges = <0x0 0x0 0x0 0x0 0x0 0x18000000>;
348 dma-ranges = <0x0 0x0 0x0 0x0 0x10 0x0>;
354 reg = <0x0 0x10400000 0x0 0x10000>, /* GICD */
355 <0x0 0x10600000 0x0 0x200000>; /* GICR_RD+GICR_SGI */
361 reg = <0x0 0x10200000 0x0 0x10000>;
372 /* Per context non-secure context interrupts, 0-3 interrupts */
381 reg = <0x0 0x12100000 0x0 0x10000>;
396 /* Per context non-secure context interrupts, 0-7 interrupts */
409 reg = <0x0 0x14900000 0x0 0x10000>;
418 /* Per context non-secure context interrupts, 0-1 interrupts */
425 reg = <0x0 0x15450000 0x0 0x10000>;
434 /* Per context non-secure context interrupts, 0-1 interrupts */
441 reg = <0x0 0x10010000 0x0 0x3000>;
455 reg = <0x0 0x11c10000 0x0 0x3000>;
463 reg = <0x0 0x12610000 0x0 0x3000>;
471 reg = <0x0 0x12810000 0x0 0x3000>;
479 reg = <0x0 0x14010000 0x0 0x3000>;
497 reg = <0x0 0x15010000 0x0 0x3000>;
511 reg = <0x0 0x16810000 0x0 0x3000>;
523 reg = <0x0 0x10100000 0x0 0x1000>;
528 iommus = <&smmu_imem 0x800 0x0>;
533 reg = <0x0 0x10110000 0x0 0x1000>;
538 iommus = <&smmu_imem 0x801 0x0>;
543 reg = <0x0 0x14280000 0x0 0x1000>;
548 iommus = <&smmu_peric 0x2 0x0>;
553 reg = <0x0 0x14290000 0x0 0x1000>;
558 iommus = <&smmu_peric 0x1 0x0>;
563 reg = <0x0 0x14180000 0x0 0x100>;
565 dmas = <&pdma1 1>, <&pdma1 0>;
575 reg = <0x0 0x14190000 0x0 0x100>;
587 reg = <0x0 0x11400000 0x0 0x5000>;
592 reg = <0x0 0x100a0000 0x0 0x100>;
601 reg = <0x0 0x100b0000 0x0 0x100>;
610 reg = <0x0 0x100c0000 0x0 0x100>;
619 reg = <0x0 0x14100000 0x0 0x100>;
620 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
629 reg = <0x0 0x14110000 0x0 0x100>;
630 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
639 reg = <0x0 0x14200000 0x0 0x1000>;
642 #size-cells = <0>;
644 pinctrl-0 = <&hs_i2c0_bus>;
652 reg = <0x0 0x14210000 0x0 0x1000>;
655 #size-cells = <0>;
657 pinctrl-0 = <&hs_i2c1_bus>;
665 reg = <0x0 0x14220000 0x0 0x1000>;
668 #size-cells = <0>;
670 pinctrl-0 = <&hs_i2c2_bus>;
678 reg = <0x0 0x14230000 0x0 0x1000>;
681 #size-cells = <0>;
683 pinctrl-0 = <&hs_i2c3_bus>;
691 reg = <0x0 0x14240000 0x0 0x1000>;
694 #size-cells = <0>;
696 pinctrl-0 = <&hs_i2c4_bus>;
704 reg = <0x0 0x14250000 0x0 0x1000>;
707 #size-cells = <0>;
709 pinctrl-0 = <&hs_i2c5_bus>;
717 reg = <0x0 0x14260000 0x0 0x1000>;
720 #size-cells = <0>;
722 pinctrl-0 = <&hs_i2c6_bus>;
730 reg = <0x0 0x14270000 0x0 0x1000>;
733 #size-cells = <0>;
735 pinctrl-0 = <&hs_i2c7_bus>;
743 reg = <0x0 0x114f0000 0x0 0x1000>;
748 reg = <0x0 0x141f0000 0x0 0x1000>;
754 reg = <0x0 0x15020000 0x0 0x1000>;
760 reg = <0x0 0x14140000 0x0 0x100>;
765 #size-cells = <0>;
769 samsung,spi-src-clk = <0>;
771 pinctrl-0 = <&spi0_bus>;
778 reg = <0x0 0x14150000 0x0 0x100>;
783 #size-cells = <0>;
787 samsung,spi-src-clk = <0>;
789 pinctrl-0 = <&spi1_bus>;
796 reg = <0x0 0x14160000 0x0 0x100>;
801 #size-cells = <0>;
805 samsung,spi-src-clk = <0>;
807 pinctrl-0 = <&spi2_bus>;
814 reg = <0x0 0x10040000 0x0 0x800>;
837 reg = <0x0 0x15120000 0x0 0x200>, /* 0: HCI standard */
838 <0x0 0x15121100 0x0 0x200>, /* 1: Vendor specified */
839 <0x0 0x15110000 0x0 0x8000>, /* 2: UNIPRO */
840 <0x0 0x15130000 0x0 0x100>; /* 3: UFS protector */
846 freq-table-hz = <0 0>, <0 0>;
848 pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
856 reg = <0x0 0x15124000 0x0 0x800>;
859 #phy-cells = <0>;