Lines Matching +full:0 +full:x66000000
21 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0 0x000>;
54 reg = <0 0x001>;
65 reg = <0 0x002>;
76 reg = <0 0x003>;
135 #clock-cells = <0>;
190 reg = <0x0 0x81000000 0x0 0x01000000>;
195 soc@0 {
199 ranges = <0 0 0 0xffffffff>;
204 reg = <0x54006000 0x100>;
206 #size-cells = <0>;
209 pinctrl-0 = <&pinctrl_spi0>;
217 reg = <0x54006100 0x100>;
219 #size-cells = <0>;
222 pinctrl-0 = <&pinctrl_spi1>;
230 reg = <0x54006800 0x40>;
233 pinctrl-0 = <&pinctrl_uart0>;
234 clocks = <&peri_clk 0>;
235 resets = <&peri_rst 0>;
241 reg = <0x54006900 0x40>;
244 pinctrl-0 = <&pinctrl_uart1>;
252 reg = <0x54006a00 0x40>;
255 pinctrl-0 = <&pinctrl_uart2>;
263 reg = <0x54006b00 0x40>;
266 pinctrl-0 = <&pinctrl_uart3>;
273 reg = <0x55000000 0x200>;
279 gpio-ranges = <&pinctrl 0 0 0>,
280 <&pinctrl 104 0 0>,
281 <&pinctrl 168 0 0>;
286 socionext,interrupt-ranges = <0 48 16>, <16 154 5>,
293 reg = <0x58780000 0x80>;
295 #size-cells = <0>;
298 pinctrl-0 = <&pinctrl_i2c0>;
307 reg = <0x58781000 0x80>;
309 #size-cells = <0>;
312 pinctrl-0 = <&pinctrl_i2c1>;
321 reg = <0x58782000 0x80>;
323 #size-cells = <0>;
326 pinctrl-0 = <&pinctrl_i2c2>;
335 reg = <0x58783000 0x80>;
337 #size-cells = <0>;
340 pinctrl-0 = <&pinctrl_i2c3>;
349 reg = <0x58786000 0x80>;
351 #size-cells = <0>;
361 reg = <0x58c00000 0x400>;
365 pinctrl-0 = <&pinctrl_system_bus>;
370 reg = <0x59801000 0x400>;
376 reg = <0x59810000 0x400>;
392 reg = <0x59820000 0x200>;
407 reg = <0x5a000000 0x400>;
410 pinctrl-0 = <&pinctrl_emmc>;
427 reg = <0x5a400000 0x800>;
430 pinctrl-0 = <&pinctrl_sd>;
432 clocks = <&sd_clk 0>;
434 resets = <&sd_rst 0>;
445 reg = <0x5f800000 0x2000>;
457 ranges = <0 0x5f900000 0x2000>;
461 reg = <0x100 0x28>;
466 reg = <0x200 0x68>;
472 reg = <0x54 1>;
476 reg = <0x55 1>;
480 reg = <0x58 1>;
484 reg = <0x59 1>;
487 usb_sel_t0: trim@54,0 {
488 reg = <0x54 1>;
489 bits = <0 4>;
491 usb_sel_t1: trim@55,0 {
492 reg = <0x55 1>;
493 bits = <0 4>;
495 usb_sel_t2: trim@58,0 {
496 reg = <0x58 1>;
497 bits = <0 4>;
499 usb_sel_t3: trim@59,0 {
500 reg = <0x59 1>;
501 bits = <0 4>;
503 usb_hs_i0: trim@56,0 {
504 reg = <0x56 1>;
505 bits = <0 4>;
507 usb_hs_i2: trim@5a,0 {
508 reg = <0x5a 1>;
509 bits = <0 4>;
516 reg = <0x5fc10000 0x5300>;
524 reg = <0x5fc20000 0x200>;
531 reg = <0x5fe00000 0x10000>, /* GICD */
532 <0x5fe80000 0x80000>; /* GICR */
541 reg = <0x61840000 0x10000>;
560 #thermal-sensor-cells = <0>;
561 socionext,tmod-calibration = <0x0f22 0x68ee>;
568 reg = <0x65000000 0x8500>;
571 pinctrl-0 = <&pinctrl_ether_rgmii>;
578 socionext,syscon-phy-mode = <&soc_glue 0>;
582 #size-cells = <0>;
589 reg = <0x65200000 0x8500>;
592 pinctrl-0 = <&pinctrl_ether1_rgmii>;
603 #size-cells = <0>;
611 reg = <0x65600000 0x10000>;
614 resets = <&sys_rst 28>, <&ahci0_rst 0>;
624 ranges = <0 0x65700000 0x100>;
626 ahci0_rst: reset-controller@0 {
628 reg = <0x0 0x4>;
638 reg = <0x10 0x10>;
643 #phy-cells = <0>;
651 reg = <0x65800000 0x10000>;
654 resets = <&sys_rst 29>, <&ahci1_rst 0>;
664 ranges = <0 0x65900000 0x100>;
666 ahci1_rst: reset-controller@0 {
668 reg = <0x0 0x4>;
678 reg = <0x10 0x10>;
683 #phy-cells = <0>;
690 reg = <0x65a00000 0xcd00>;
694 pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
708 ranges = <0 0x65b00000 0x400>;
710 usb0_rst: reset@0 {
712 reg = <0x0 0x4>;
722 reg = <0x100 0x10>;
731 reg = <0x110 0x10>;
740 reg = <0x200 0x10>;
741 #phy-cells = <0>;
754 reg = <0x210 0x10>;
755 #phy-cells = <0>;
768 reg = <0x300 0x10>;
769 #phy-cells = <0>;
779 reg = <0x310 0x10>;
780 #phy-cells = <0>;
792 reg = <0x65c00000 0xcd00>;
796 pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
810 ranges = <0 0x65d00000 0x400>;
812 usb1_rst: reset@0 {
814 reg = <0x0 0x4>;
824 reg = <0x100 0x10>;
833 reg = <0x110 0x10>;
842 reg = <0x200 0x10>;
843 #phy-cells = <0>;
857 reg = <0x210 0x10>;
858 #phy-cells = <0>;
872 reg = <0x300 0x10>;
873 #phy-cells = <0>;
887 reg = <0x66000000 0x1000>, <0x66010000 0x10000>,
888 <0x2fff0000 0x10000>;
895 bus-range = <0x0 0xff>;
899 <0x81000000 0 0x00000000 0x2ffe0000 0 0x00010000>,
901 <0x82000000 0 0x20000000 0x20000000 0 0x0ffe0000>;
906 interrupt-map-mask = <0 0 0 7>;
907 interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */
908 <0 0 0 2 &pcie_intc 1>, /* INTB */
909 <0 0 0 3 &pcie_intc 2>, /* INTC */
910 <0 0 0 4 &pcie_intc 3>; /* INTD */
924 reg = <0x66038000 0x4000>;
925 #phy-cells = <0>;
937 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
939 #size-cells = <0>;
942 pinctrl-0 = <&pinctrl_nand>;