Lines Matching full:cru
14 clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>,
15 <&cru CLK_SATA0_RXOOB>;
55 <&cru PCLK_PCIE30PHY>;
57 resets = <&cru SRST_PCIE30PHY>;
68 clocks = <&cru ACLK_PCIE30X1_MST>, <&cru ACLK_PCIE30X1_SLV>,
69 <&cru ACLK_PCIE30X1_DBI>, <&cru PCLK_PCIE30X1>,
70 <&cru CLK_PCIE30X1_AUX_NDFT>;
101 resets = <&cru SRST_PCIE30X1_POWERUP>;
120 clocks = <&cru ACLK_PCIE30X2_MST>, <&cru ACLK_PCIE30X2_SLV>,
121 <&cru ACLK_PCIE30X2_DBI>, <&cru PCLK_PCIE30X2>,
122 <&cru CLK_PCIE30X2_AUX_NDFT>;
153 resets = <&cru SRST_PCIE30X2_POWERUP>;
173 clocks = <&cru SCLK_GMAC0>, <&cru SCLK_GMAC0_RX_TX>,
174 <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_MAC0_REFOUT>,
175 <&cru ACLK_GMAC0>, <&cru PCLK_GMAC0>,
176 <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_GMAC0_PTP_REF>;
181 resets = <&cru SRST_A_GMAC0>;
218 <&cru PCLK_PIPEPHY0>,
219 <&cru PCLK_PIPE>;
223 resets = <&cru SRST_PIPEPHY0>;
245 clocks = <&cru PCLK_PIPE>;