Lines Matching +full:0 +full:xff940000
41 #size-cells = <0>;
69 cpu_l0: cpu@0 {
72 reg = <0x0 0x0>;
84 reg = <0x0 0x1>;
96 reg = <0x0 0x2>;
108 reg = <0x0 0x3>;
120 reg = <0x0 0x100>;
138 reg = <0x0 0x101>;
159 arm,psci-suspend-param = <0x0010000>;
168 arm,psci-suspend-param = <0x1010000>;
207 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
208 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
209 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
210 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
218 #clock-cells = <0>;
223 reg = <0x0 0xf8000000 0x0 0x2000000>,
224 <0x0 0xfd000000 0x0 0x1000000>;
231 bus-range = <0x0 0x1f>;
236 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
237 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
238 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
240 interrupt-map-mask = <0 0 0 7>;
241 interrupt-map = <0 0 0 1 &pcie0_intc 0>,
242 <0 0 0 2 &pcie0_intc 1>,
243 <0 0 0 3 &pcie0_intc 2>,
244 <0 0 0 4 &pcie0_intc 3>;
246 msi-map = <0x0 &its 0x0 0x1000>;
247 phys = <&pcie_phy 0>, <&pcie_phy 1>,
249 phy-names = "pcie-phy-0", "pcie-phy-1",
251 ranges = <0x82000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000>,
252 <0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>;
263 #address-cells = <0>;
270 reg = <0x0 0xfe300000 0x0 0x10000>;
271 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0>;
285 snps,txpbl = <0x4>;
292 reg = <0x0 0xfe310000 0x0 0x4000>;
293 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH 0>;
298 fifo-depth = <0x100>;
308 reg = <0x0 0xfe320000 0x0 0x4000>;
309 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
316 fifo-depth = <0x100>;
325 reg = <0x0 0xfe330000 0x0 0x10000>;
326 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>;
333 #clock-cells = <0>;
343 reg = <0x0 0xfe380000 0x0 0x20000>;
344 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0>;
354 reg = <0x0 0xfe3a0000 0x0 0x20000>;
355 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>;
365 reg = <0x0 0xfe3c0000 0x0 0x20000>;
366 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>;
376 reg = <0x0 0xfe3e0000 0x0 0x20000>;
377 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH 0>;
387 reg = <0 0xfe430000 0 0x1000>;
395 reg = <0 0xfe432000 0 0x1000>;
403 reg = <0 0xfe434000 0 0x1000>;
411 reg = <0 0xfe436000 0 0x1000>;
419 reg = <0 0xfe610000 0 0x1000>;
427 reg = <0 0xfe710000 0 0x1000>;
450 reg = <0x0 0xfe800000 0x0 0x100000>;
451 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
486 reg = <0x0 0xfe900000 0x0 0x100000>;
487 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
507 reg = <0x0 0xfec00000 0x0 0x100000>;
508 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
526 #size-cells = <0>;
528 dp_in_vopb: endpoint@0 {
529 reg = <0>;
549 reg = <0x0 0xfee00000 0 0x10000>, /* GICD */
550 <0x0 0xfef00000 0 0xc0000>, /* GICR */
551 <0x0 0xfff00000 0 0x10000>, /* GICC */
552 <0x0 0xfff10000 0 0x10000>, /* GICH */
553 <0x0 0xfff20000 0 0x10000>; /* GICV */
554 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
559 reg = <0x0 0xfee20000 0x0 0x20000>;
563 ppi_cluster0: interrupt-partition-0 {
575 reg = <0x0 0xff100000 0x0 0x100>;
576 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH 0>;
587 reg = <0x0 0xff110000 0x0 0x1000>;
592 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH 0>;
594 pinctrl-0 = <&i2c1_xfer>;
596 #size-cells = <0>;
602 reg = <0x0 0xff120000 0x0 0x1000>;
607 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH 0>;
609 pinctrl-0 = <&i2c2_xfer>;
611 #size-cells = <0>;
617 reg = <0x0 0xff130000 0x0 0x1000>;
622 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH 0>;
624 pinctrl-0 = <&i2c3_xfer>;
626 #size-cells = <0>;
632 reg = <0x0 0xff140000 0x0 0x1000>;
637 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0>;
639 pinctrl-0 = <&i2c5_xfer>;
641 #size-cells = <0>;
647 reg = <0x0 0xff150000 0x0 0x1000>;
652 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH 0>;
654 pinctrl-0 = <&i2c6_xfer>;
656 #size-cells = <0>;
662 reg = <0x0 0xff160000 0x0 0x1000>;
667 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH 0>;
669 pinctrl-0 = <&i2c7_xfer>;
671 #size-cells = <0>;
677 reg = <0x0 0xff180000 0x0 0x100>;
680 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
684 pinctrl-0 = <&uart0_xfer>;
690 reg = <0x0 0xff190000 0x0 0x100>;
693 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH 0>;
697 pinctrl-0 = <&uart1_xfer>;
703 reg = <0x0 0xff1a0000 0x0 0x100>;
706 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0>;
710 pinctrl-0 = <&uart2c_xfer>;
716 reg = <0x0 0xff1b0000 0x0 0x100>;
719 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0>;
723 pinctrl-0 = <&uart3_xfer>;
729 reg = <0x0 0xff1c0000 0x0 0x1000>;
732 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH 0>;
736 pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
738 #size-cells = <0>;
744 reg = <0x0 0xff1d0000 0x0 0x1000>;
747 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH 0>;
751 pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
753 #size-cells = <0>;
759 reg = <0x0 0xff1e0000 0x0 0x1000>;
762 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH 0>;
766 pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
768 #size-cells = <0>;
774 reg = <0x0 0xff1f0000 0x0 0x1000>;
777 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH 0>;
781 pinctrl-0 = <&spi4_clk &spi4_tx &spi4_rx &spi4_cs0>;
783 #size-cells = <0>;
789 reg = <0x0 0xff200000 0x0 0x1000>;
792 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH 0>;
796 pinctrl-0 = <&spi5_clk &spi5_tx &spi5_rx &spi5_cs0>;
799 #size-cells = <0>;
808 thermal-sensors = <&tsadc 0>;
879 reg = <0x0 0xff260000 0x0 0x100>;
880 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0>;
890 pinctrl-0 = <&otp_pin>;
899 reg = <0x0 0xffa58000 0x0 0x20>;
904 reg = <0x0 0xffa5c000 0x0 0x20>;
909 reg = <0x0 0xffa60080 0x0 0x20>;
914 reg = <0x0 0xffa60100 0x0 0x20>;
919 reg = <0x0 0xffa60180 0x0 0x20>;
924 reg = <0x0 0xffa70000 0x0 0x20>;
929 reg = <0x0 0xffa70080 0x0 0x20>;
934 reg = <0x0 0xffa74000 0x0 0x20>;
939 reg = <0x0 0xffa76000 0x0 0x20>;
944 reg = <0x0 0xffa90000 0x0 0x20>;
949 reg = <0x0 0xffa98000 0x0 0x20>;
954 reg = <0x0 0xffaa0000 0x0 0x20>;
959 reg = <0x0 0xffaa0080 0x0 0x20>;
964 reg = <0x0 0xffaa8000 0x0 0x20>;
969 reg = <0x0 0xffaa8080 0x0 0x20>;
974 reg = <0x0 0xffab0000 0x0 0x20>;
979 reg = <0x0 0xffab0080 0x0 0x20>;
984 reg = <0x0 0xffab8000 0x0 0x20>;
989 reg = <0x0 0xffac0000 0x0 0x20>;
994 reg = <0x0 0xffac0080 0x0 0x20>;
999 reg = <0x0 0xffac8000 0x0 0x20>;
1004 reg = <0x0 0xffac8080 0x0 0x20>;
1009 reg = <0x0 0xffad0000 0x0 0x20>;
1014 reg = <0x0 0xffad8080 0x0 0x20>;
1019 reg = <0x0 0xffae0000 0x0 0x20>;
1024 reg = <0x0 0xff310000 0x0 0x1000>;
1037 #size-cells = <0>;
1045 #power-domain-cells = <0>;
1053 #power-domain-cells = <0>;
1060 #power-domain-cells = <0>;
1068 #power-domain-cells = <0>;
1076 #power-domain-cells = <0>;
1083 #power-domain-cells = <0>;
1089 #power-domain-cells = <0>;
1096 #power-domain-cells = <0>;
1103 #power-domain-cells = <0>;
1109 #power-domain-cells = <0>;
1115 #power-domain-cells = <0>;
1121 #power-domain-cells = <0>;
1128 #power-domain-cells = <0>;
1134 #size-cells = <0>;
1142 #power-domain-cells = <0>;
1150 #power-domain-cells = <0>;
1158 #power-domain-cells = <0>;
1164 #size-cells = <0>;
1172 #power-domain-cells = <0>;
1179 #power-domain-cells = <0>;
1188 reg = <0x0 0xff320000 0x0 0x1000>;
1198 reg = <0x0 0xff350000 0x0 0x1000>;
1201 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH 0>;
1203 pinctrl-0 = <&spi3_clk &spi3_tx &spi3_rx &spi3_cs0>;
1205 #size-cells = <0>;
1211 reg = <0x0 0xff370000 0x0 0x100>;
1214 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH 0>;
1218 pinctrl-0 = <&uart4_xfer>;
1224 reg = <0x0 0xff3c0000 0x0 0x1000>;
1229 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH 0>;
1231 pinctrl-0 = <&i2c0_xfer>;
1233 #size-cells = <0>;
1239 reg = <0x0 0xff3d0000 0x0 0x1000>;
1244 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH 0>;
1246 pinctrl-0 = <&i2c4_xfer>;
1248 #size-cells = <0>;
1254 reg = <0x0 0xff3e0000 0x0 0x1000>;
1259 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
1261 pinctrl-0 = <&i2c8_xfer>;
1263 #size-cells = <0>;
1269 reg = <0x0 0xff420000 0x0 0x10>;
1272 pinctrl-0 = <&pwm0_pin>;
1279 reg = <0x0 0xff420010 0x0 0x10>;
1282 pinctrl-0 = <&pwm1_pin>;
1289 reg = <0x0 0xff420020 0x0 0x10>;
1292 pinctrl-0 = <&pwm2_pin>;
1299 reg = <0x0 0xff420030 0x0 0x10>;
1302 pinctrl-0 = <&pwm3a_pin>;
1308 reg = <0x00 0xff630000 0x00 0x4000>;
1311 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
1319 reg = <0x0 0xff650000 0x0 0x800>;
1320 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>,
1321 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
1331 reg = <0x0 0xff650800 0x0 0x40>;
1332 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
1335 #iommu-cells = <0>;
1341 reg = <0x0 0xff660000 0x0 0x400>;
1342 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
1352 reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
1353 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
1357 #iommu-cells = <0>;
1362 reg = <0x0 0xff670800 0x0 0x40>;
1363 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
1366 #iommu-cells = <0>;
1372 reg = <0x0 0xff680000 0x0 0x10000>;
1373 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH 0>;
1383 reg = <0x0 0xff690000 0x0 0x80>;
1391 reg = <0x07 0x10>;
1394 reg = <0x17 0x1>;
1397 reg = <0x18 0x1>;
1400 reg = <0x19 0x1>;
1403 reg = <0x1a 0x1>;
1406 reg = <0x1b 0x1>;
1409 reg = <0x1c 0x1>;
1415 reg = <0x0 0xff6d0000 0x0 0x4000>;
1416 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0>,
1417 <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0>;
1426 reg = <0x0 0xff6e0000 0x0 0x4000>;
1427 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH 0>,
1428 <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0>;
1437 reg = <0x0 0xff750000 0x0 0x1000>;
1449 reg = <0x0 0xff760000 0x0 0x1000>;
1483 reg = <0x0 0xff770000 0x0 0x10000>;
1499 #phy-cells = <0>;
1505 reg = <0xe450 0x10>;
1508 #clock-cells = <0>;
1513 #phy-cells = <0>;
1514 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
1520 #phy-cells = <0>;
1521 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
1522 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
1523 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
1532 reg = <0xe460 0x10>;
1535 #clock-cells = <0>;
1540 #phy-cells = <0>;
1541 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH 0>;
1547 #phy-cells = <0>;
1548 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>,
1549 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>,
1550 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
1559 reg = <0xf780 0x24>;
1563 #phy-cells = <0>;
1580 reg = <0x0 0xff7c0000 0x0 0x40000>;
1595 #phy-cells = <0>;
1599 #phy-cells = <0>;
1605 reg = <0x0 0xff800000 0x0 0x40000>;
1620 #phy-cells = <0>;
1624 #phy-cells = <0>;
1630 reg = <0x0 0xff848000 0x0 0x100>;
1632 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH 0>;
1637 reg = <0x0 0xff850000 0x0 0x1000>;
1638 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH 0>;
1645 reg = <0x0 0xff870000 0x0 0x1000>;
1646 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH 0>;
1652 pinctrl-0 = <&spdif_bus>;
1654 #sound-dai-cells = <0>;
1660 reg = <0x0 0xff880000 0x0 0x1000>;
1662 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH 0>;
1663 dmas = <&dmac_bus 0>, <&dmac_bus 1>;
1668 pinctrl-0 = <&i2s0_8ch_bus>;
1671 #sound-dai-cells = <0>;
1677 reg = <0x0 0xff890000 0x0 0x1000>;
1678 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 0>;
1684 pinctrl-0 = <&i2s1_2ch_bus>;
1686 #sound-dai-cells = <0>;
1692 reg = <0x0 0xff8a0000 0x0 0x1000>;
1693 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 0>;
1699 #sound-dai-cells = <0>;
1705 reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
1706 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
1719 #size-cells = <0>;
1721 vopl_out_mipi: endpoint@0 {
1722 reg = <0>;
1750 reg = <0x0 0xff8f3f00 0x0 0x100>;
1751 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
1755 #iommu-cells = <0>;
1761 reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;
1762 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1775 #size-cells = <0>;
1777 vopb_out_edp: endpoint@0 {
1778 reg = <0>;
1806 reg = <0x0 0xff903f00 0x0 0x100>;
1807 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1811 #iommu-cells = <0>;
1817 reg = <0x0 0xff910000 0x0 0x4000>;
1818 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
1831 #size-cells = <0>;
1833 port@0 {
1834 reg = <0>;
1836 #size-cells = <0>;
1843 reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
1844 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
1847 #iommu-cells = <0>;
1854 reg = <0x0 0xff920000 0x0 0x4000>;
1855 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
1868 #size-cells = <0>;
1870 port@0 {
1871 reg = <0>;
1873 #size-cells = <0>;
1880 reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
1881 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
1884 #iommu-cells = <0>;
1906 reg = <0x0 0xff940000 0x0 0x20000>;
1907 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
1917 #sound-dai-cells = <0>;
1923 #size-cells = <0>;
1925 hdmi_in_vopb: endpoint@0 {
1926 reg = <0>;
1939 reg = <0x0 0xff960000 0x0 0x8000>;
1940 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
1949 #size-cells = <0>;
1954 #size-cells = <0>;
1956 mipi_in: port@0 {
1957 reg = <0>;
1959 #size-cells = <0>;
1961 mipi_in_vopb: endpoint@0 {
1962 reg = <0>;
1975 reg = <0x0 0xff968000 0x0 0x8000>;
1976 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH 0>;
1985 #size-cells = <0>;
1986 #phy-cells = <0>;
1991 #size-cells = <0>;
1993 mipi1_in: port@0 {
1994 reg = <0>;
1996 #size-cells = <0>;
1998 mipi1_in_vopb: endpoint@0 {
1999 reg = <0>;
2013 reg = <0x0 0xff970000 0x0 0x8000>;
2014 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
2018 pinctrl-0 = <&edp_hpd>;
2027 #size-cells = <0>;
2028 edp_in: port@0 {
2029 reg = <0>;
2031 #size-cells = <0>;
2033 edp_in_vopb: endpoint@0 {
2034 reg = <0>;
2048 reg = <0x0 0xff9a0000 0x0 0x10000>;
2049 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
2050 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>,
2051 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>;
2069 reg = <0x0 0xff720000 0x0 0x100>;
2071 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
2074 #gpio-cells = <0x2>;
2077 #interrupt-cells = <0x2>;
2082 reg = <0x0 0xff730000 0x0 0x100>;
2084 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
2087 #gpio-cells = <0x2>;
2090 #interrupt-cells = <0x2>;
2095 reg = <0x0 0xff780000 0x0 0x100>;
2097 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
2100 #gpio-cells = <0x2>;
2103 #interrupt-cells = <0x2>;
2108 reg = <0x0 0xff788000 0x0 0x100>;
2110 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
2113 #gpio-cells = <0x2>;
2116 #interrupt-cells = <0x2>;
2121 reg = <0x0 0xff790000 0x0 0x100>;
2123 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
2126 #gpio-cells = <0x2>;
2129 #interrupt-cells = <0x2>;
2235 rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>;
2489 <0 RK_PA3 1 &pcfg_pull_up>;
2494 <0 RK_PA4 1 &pcfg_pull_up>;
2524 <0 RK_PA7 1 &pcfg_pull_up>;
2529 <0 RK_PB0 1 &pcfg_pull_up>;
2539 rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>;
2676 <0 RK_PA0 1 &pcfg_pull_none>;
2686 <0 RK_PB0 3 &pcfg_pull_none>;
2833 <0 RK_PA6 1 &pcfg_pull_none>;