Lines Matching +full:axi +full:- +full:adc +full:- +full:10
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g054-cpg.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
23 audio_clk2: audio2-clk {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
27 clock-frequency = <0>;
30 /* External CAN clock - to be overridden by boards that provide it */
31 can_clk: can-clk {
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <0>;
38 extal_clk: extal-clk {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
42 clock-frequency = <0>;
45 cluster0_opp: opp-table-0 {
46 compatible = "operating-points-v2";
47 opp-shared;
49 opp-150000000 {
50 opp-hz = /bits/ 64 <150000000>;
51 opp-microvolt = <1100000>;
52 clock-latency-ns = <300000>;
54 opp-300000000 {
55 opp-hz = /bits/ 64 <300000000>;
56 opp-microvolt = <1100000>;
57 clock-latency-ns = <300000>;
59 opp-600000000 {
60 opp-hz = /bits/ 64 <600000000>;
61 opp-microvolt = <1100000>;
62 clock-latency-ns = <300000>;
64 opp-1200000000 {
65 opp-hz = /bits/ 64 <1200000000>;
66 opp-microvolt = <1100000>;
67 clock-latency-ns = <300000>;
68 opp-suspend;
73 #address-cells = <1>;
74 #size-cells = <0>;
76 cpu-map {
88 compatible = "arm,cortex-a55";
91 #cooling-cells = <2>;
92 next-level-cache = <&L3_CA55>;
93 enable-method = "psci";
95 operating-points-v2 = <&cluster0_opp>;
99 compatible = "arm,cortex-a55";
102 next-level-cache = <&L3_CA55>;
103 enable-method = "psci";
105 operating-points-v2 = <&cluster0_opp>;
108 L3_CA55: cache-controller-0 {
110 cache-unified;
111 cache-size = <0x40000>;
115 gpu_opp_table: opp-table-1 {
116 compatible = "operating-points-v2";
118 opp-500000000 {
119 opp-hz = /bits/ 64 <500000000>;
120 opp-microvolt = <1100000>;
123 opp-400000000 {
124 opp-hz = /bits/ 64 <400000000>;
125 opp-microvolt = <1100000>;
128 opp-250000000 {
129 opp-hz = /bits/ 64 <250000000>;
130 opp-microvolt = <1100000>;
133 opp-200000000 {
134 opp-hz = /bits/ 64 <200000000>;
135 opp-microvolt = <1100000>;
138 opp-125000000 {
139 opp-hz = /bits/ 64 <125000000>;
140 opp-microvolt = <1100000>;
143 opp-100000000 {
144 opp-hz = /bits/ 64 <100000000>;
145 opp-microvolt = <1100000>;
148 opp-62500000 {
149 opp-hz = /bits/ 64 <62500000>;
150 opp-microvolt = <1100000>;
153 opp-50000000 {
154 opp-hz = /bits/ 64 <50000000>;
155 opp-microvolt = <1100000>;
160 compatible = "arm,psci-1.0", "arm,psci-0.2";
165 compatible = "simple-bus";
166 interrupt-parent = <&gic>;
167 #address-cells = <2>;
168 #size-cells = <2>;
172 compatible = "renesas,r9a07g054-ssi",
173 "renesas,rz-ssi";
179 interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
183 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
186 dma-names = "tx", "rx";
187 power-domains = <&cpg>;
188 #sound-dai-cells = <0>;
193 compatible = "renesas,r9a07g054-ssi",
194 "renesas,rz-ssi";
200 interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
204 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
207 dma-names = "tx", "rx";
208 power-domains = <&cpg>;
209 #sound-dai-cells = <0>;
214 compatible = "renesas,r9a07g054-ssi",
215 "renesas,rz-ssi";
221 interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
225 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
228 dma-names = "rt";
229 power-domains = <&cpg>;
230 #sound-dai-cells = <0>;
235 compatible = "renesas,r9a07g054-ssi",
236 "renesas,rz-ssi";
242 interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
246 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
249 dma-names = "tx", "rx";
250 power-domains = <&cpg>;
251 #sound-dai-cells = <0>;
256 compatible = "renesas,r9a07g054-rspi", "renesas,rspi-rz";
261 interrupt-names = "error", "rx", "tx";
265 dma-names = "tx", "rx";
266 power-domains = <&cpg>;
267 num-cs = <1>;
268 #address-cells = <1>;
269 #size-cells = <0>;
274 compatible = "renesas,r9a07g054-rspi", "renesas,rspi-rz";
279 interrupt-names = "error", "rx", "tx";
283 dma-names = "tx", "rx";
284 power-domains = <&cpg>;
285 num-cs = <1>;
286 #address-cells = <1>;
287 #size-cells = <0>;
292 compatible = "renesas,r9a07g054-rspi", "renesas,rspi-rz";
297 interrupt-names = "error", "rx", "tx";
301 dma-names = "tx", "rx";
302 power-domains = <&cpg>;
303 num-cs = <1>;
304 #address-cells = <1>;
305 #size-cells = <0>;
310 compatible = "renesas,scif-r9a07g054",
311 "renesas,scif-r9a07g044";
319 interrupt-names = "eri", "rxi", "txi",
322 clock-names = "fck";
323 power-domains = <&cpg>;
329 compatible = "renesas,scif-r9a07g054",
330 "renesas,scif-r9a07g044";
338 interrupt-names = "eri", "rxi", "txi",
341 clock-names = "fck";
342 power-domains = <&cpg>;
348 compatible = "renesas,scif-r9a07g054",
349 "renesas,scif-r9a07g044";
357 interrupt-names = "eri", "rxi", "txi",
360 clock-names = "fck";
361 power-domains = <&cpg>;
367 compatible = "renesas,scif-r9a07g054",
368 "renesas,scif-r9a07g044";
376 interrupt-names = "eri", "rxi", "txi",
379 clock-names = "fck";
380 power-domains = <&cpg>;
386 compatible = "renesas,scif-r9a07g054",
387 "renesas,scif-r9a07g044";
395 interrupt-names = "eri", "rxi", "txi",
398 clock-names = "fck";
399 power-domains = <&cpg>;
405 compatible = "renesas,r9a07g054-sci", "renesas,sci";
411 interrupt-names = "eri", "rxi", "txi", "tei";
413 clock-names = "fck";
414 power-domains = <&cpg>;
420 compatible = "renesas,r9a07g054-sci", "renesas,sci";
426 interrupt-names = "eri", "rxi", "txi", "tei";
428 clock-names = "fck";
429 power-domains = <&cpg>;
435 compatible = "renesas,r9a07g054-canfd", "renesas,rzg2l-canfd";
445 interrupt-names = "g_err", "g_recc",
451 clock-names = "fck", "canfd", "can_clk";
452 assigned-clocks = <&cpg CPG_CORE R9A07G054_CLK_P0_DIV2>;
453 assigned-clock-rates = <50000000>;
456 reset-names = "rstp_n", "rstc_n";
457 power-domains = <&cpg>;
469 #address-cells = <1>;
470 #size-cells = <0>;
471 compatible = "renesas,riic-r9a07g054", "renesas,riic-rz";
481 interrupt-names = "tei", "ri", "ti", "spi", "sti",
484 clock-frequency = <100000>;
486 power-domains = <&cpg>;
491 #address-cells = <1>;
492 #size-cells = <0>;
493 compatible = "renesas,riic-r9a07g054", "renesas,riic-rz";
503 interrupt-names = "tei", "ri", "ti", "spi", "sti",
506 clock-frequency = <100000>;
508 power-domains = <&cpg>;
513 #address-cells = <1>;
514 #size-cells = <0>;
515 compatible = "renesas,riic-r9a07g054", "renesas,riic-rz";
525 interrupt-names = "tei", "ri", "ti", "spi", "sti",
528 clock-frequency = <100000>;
530 power-domains = <&cpg>;
535 #address-cells = <1>;
536 #size-cells = <0>;
537 compatible = "renesas,riic-r9a07g054", "renesas,riic-rz";
547 interrupt-names = "tei", "ri", "ti", "spi", "sti",
550 clock-frequency = <100000>;
552 power-domains = <&cpg>;
556 adc: adc@10059000 { label
557 compatible = "renesas,r9a07g054-adc", "renesas,rzg2l-adc";
562 clock-names = "adclk", "pclk";
565 reset-names = "presetn", "adrst-n";
566 power-domains = <&cpg>;
569 #address-cells = <1>;
570 #size-cells = <0>;
599 compatible = "renesas,r9a07g054-tsu",
600 "renesas,rzg2l-tsu";
604 power-domains = <&cpg>;
605 #thermal-sensor-cells = <1>;
609 compatible = "renesas,r9a07g054-rpc-if",
610 "renesas,rzg2l-rpc-if";
614 reg-names = "regs", "dirmap", "wbuf";
619 power-domains = <&cpg>;
620 #address-cells = <1>;
621 #size-cells = <0>;
625 cpg: clock-controller@11010000 {
626 compatible = "renesas,r9a07g054-cpg";
629 clock-names = "extal";
630 #clock-cells = <2>;
631 #reset-cells = <1>;
632 #power-domain-cells = <0>;
635 sysc: system-controller@11020000 {
636 compatible = "renesas,r9a07g054-sysc";
642 interrupt-names = "lpm_int", "ca55stbydone_int",
648 compatible = "renesas,r9a07g054-pinctrl",
649 "renesas,r9a07g044-pinctrl";
651 gpio-controller;
652 #gpio-cells = <2>;
653 #address-cells = <2>;
654 #interrupt-cells = <2>;
655 interrupt-parent = <&irqc>;
656 interrupt-controller;
657 gpio-ranges = <&pinctrl 0 0 392>;
659 power-domains = <&cpg>;
665 irqc: interrupt-controller@110a0000 {
666 compatible = "renesas,r9a07g054-irqc",
667 "renesas,rzg2l-irqc";
668 #interrupt-cells = <2>;
669 #address-cells = <0>;
670 interrupt-controller;
715 clock-names = "clk", "pclk";
716 power-domains = <&cpg>;
720 dmac: dma-controller@11820000 {
721 compatible = "renesas,r9a07g054-dmac",
722 "renesas,rz-dmac";
742 interrupt-names = "error",
749 power-domains = <&cpg>;
752 #dma-cells = <1>;
753 dma-channels = <16>;
757 compatible = "renesas,r9a07g054-mali",
758 "arm,mali-bifrost";
764 interrupt-names = "job", "mmu", "gpu", "event";
768 clock-names = "gpu", "bus", "bus_ace";
769 power-domains = <&cpg>;
773 reset-names = "rst", "axi_rst", "ace_rst";
774 operating-points-v2 = <&gpu_opp_table>;
777 gic: interrupt-controller@11900000 {
778 compatible = "arm,gic-v3";
779 #interrupt-cells = <3>;
780 #address-cells = <0>;
781 interrupt-controller;
788 compatible = "renesas,sdhi-r9a07g054",
789 "renesas,rcar-gen3-sdhi";
797 clock-names = "core", "clkh", "cd", "aclk";
799 power-domains = <&cpg>;
804 compatible = "renesas,sdhi-r9a07g054",
805 "renesas,rcar-gen3-sdhi";
813 clock-names = "core", "clkh", "cd", "aclk";
815 power-domains = <&cpg>;
820 compatible = "renesas,r9a07g054-gbeth",
821 "renesas,rzg2l-gbeth";
826 interrupt-names = "mux", "fil", "arp_ns";
827 phy-mode = "rgmii";
831 clock-names = "axi", "chi", "refclk";
833 power-domains = <&cpg>;
834 #address-cells = <1>;
835 #size-cells = <0>;
840 compatible = "renesas,r9a07g054-gbeth",
841 "renesas,rzg2l-gbeth";
846 interrupt-names = "mux", "fil", "arp_ns";
847 phy-mode = "rgmii";
851 clock-names = "axi", "chi", "refclk";
853 power-domains = <&cpg>;
854 #address-cells = <1>;
855 #size-cells = <0>;
859 phyrst: usbphy-ctrl@11c40000 {
860 compatible = "renesas,r9a07g054-usbphy-ctrl",
861 "renesas,rzg2l-usbphy-ctrl";
865 power-domains = <&cpg>;
866 #reset-cells = <1>;
871 compatible = "generic-ohci";
879 phy-names = "usb";
880 power-domains = <&cpg>;
885 compatible = "generic-ohci";
893 phy-names = "usb";
894 power-domains = <&cpg>;
899 compatible = "generic-ehci";
907 phy-names = "usb";
909 power-domains = <&cpg>;
914 compatible = "generic-ehci";
922 phy-names = "usb";
924 power-domains = <&cpg>;
928 usb2_phy0: usb-phy@11c50200 {
929 compatible = "renesas,usb2-phy-r9a07g054",
930 "renesas,rzg2l-usb2-phy";
936 #phy-cells = <1>;
937 power-domains = <&cpg>;
941 usb2_phy1: usb-phy@11c70200 {
942 compatible = "renesas,usb2-phy-r9a07g054",
943 "renesas,rzg2l-usb2-phy";
949 #phy-cells = <1>;
950 power-domains = <&cpg>;
955 compatible = "renesas,usbhs-r9a07g054",
956 "renesas,rza2-usbhs";
968 phy-names = "usb";
969 power-domains = <&cpg>;
974 compatible = "renesas,r9a07g054-wdt",
975 "renesas,rzg2l-wdt";
979 clock-names = "pclk", "oscclk";
982 interrupt-names = "wdt", "perrout";
984 power-domains = <&cpg>;
989 compatible = "renesas,r9a07g054-wdt",
990 "renesas,rzg2l-wdt";
994 clock-names = "pclk", "oscclk";
997 interrupt-names = "wdt", "perrout";
999 power-domains = <&cpg>;
1004 compatible = "renesas,r9a07g054-wdt",
1005 "renesas,rzg2l-wdt";
1009 clock-names = "pclk", "oscclk";
1012 interrupt-names = "wdt", "perrout";
1014 power-domains = <&cpg>;
1019 compatible = "renesas,r9a07g054-ostm",
1025 power-domains = <&cpg>;
1030 compatible = "renesas,r9a07g054-ostm",
1036 power-domains = <&cpg>;
1041 compatible = "renesas,r9a07g054-ostm",
1047 power-domains = <&cpg>;
1052 thermal-zones {
1053 cpu-thermal {
1054 polling-delay-passive = <250>;
1055 polling-delay = <1000>;
1056 thermal-sensors = <&tsu 0>;
1057 sustainable-power = <717>;
1059 cooling-maps {
1062 cooling-device = <&cpu0 0 2>;
1068 sensor_crit: sensor-crit {
1074 target: trip-point {
1084 compatible = "arm,armv8-timer";
1085 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1088 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;