Lines Matching +full:axi +full:- +full:usb2 +full:- +full:device
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/G2L and RZ/G2LC common SoC parts
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g044-cpg.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
23 audio_clk2: audio2-clk {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
27 clock-frequency = <0>;
30 /* External CAN clock - to be overridden by boards that provide it */
31 can_clk: can-clk {
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <0>;
38 extal_clk: extal-clk {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
42 clock-frequency = <0>;
45 cluster0_opp: opp-table-0 {
46 compatible = "operating-points-v2";
47 opp-shared;
49 opp-150000000 {
50 opp-hz = /bits/ 64 <150000000>;
51 opp-microvolt = <1100000>;
52 clock-latency-ns = <300000>;
54 opp-300000000 {
55 opp-hz = /bits/ 64 <300000000>;
56 opp-microvolt = <1100000>;
57 clock-latency-ns = <300000>;
59 opp-600000000 {
60 opp-hz = /bits/ 64 <600000000>;
61 opp-microvolt = <1100000>;
62 clock-latency-ns = <300000>;
64 opp-1200000000 {
65 opp-hz = /bits/ 64 <1200000000>;
66 opp-microvolt = <1100000>;
67 clock-latency-ns = <300000>;
68 opp-suspend;
73 #address-cells = <1>;
74 #size-cells = <0>;
76 cpu-map {
88 compatible = "arm,cortex-a55";
91 #cooling-cells = <2>;
92 next-level-cache = <&L3_CA55>;
93 enable-method = "psci";
95 operating-points-v2 = <&cluster0_opp>;
99 compatible = "arm,cortex-a55";
102 next-level-cache = <&L3_CA55>;
103 enable-method = "psci";
105 operating-points-v2 = <&cluster0_opp>;
108 L3_CA55: cache-controller-0 {
110 cache-unified;
111 cache-size = <0x40000>;
115 gpu_opp_table: opp-table-1 {
116 compatible = "operating-points-v2";
118 opp-500000000 {
119 opp-hz = /bits/ 64 <500000000>;
120 opp-microvolt = <1100000>;
123 opp-400000000 {
124 opp-hz = /bits/ 64 <400000000>;
125 opp-microvolt = <1100000>;
128 opp-250000000 {
129 opp-hz = /bits/ 64 <250000000>;
130 opp-microvolt = <1100000>;
133 opp-200000000 {
134 opp-hz = /bits/ 64 <200000000>;
135 opp-microvolt = <1100000>;
138 opp-125000000 {
139 opp-hz = /bits/ 64 <125000000>;
140 opp-microvolt = <1100000>;
143 opp-100000000 {
144 opp-hz = /bits/ 64 <100000000>;
145 opp-microvolt = <1100000>;
148 opp-62500000 {
149 opp-hz = /bits/ 64 <62500000>;
150 opp-microvolt = <1100000>;
153 opp-50000000 {
154 opp-hz = /bits/ 64 <50000000>;
155 opp-microvolt = <1100000>;
160 compatible = "arm,psci-1.0", "arm,psci-0.2";
165 compatible = "simple-bus";
166 interrupt-parent = <&gic>;
167 #address-cells = <2>;
168 #size-cells = <2>;
172 compatible = "renesas,r9a07g044-ssi",
173 "renesas,rz-ssi";
179 interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
183 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
186 dma-names = "tx", "rx";
187 power-domains = <&cpg>;
188 #sound-dai-cells = <0>;
193 compatible = "renesas,r9a07g044-ssi",
194 "renesas,rz-ssi";
200 interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
204 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
207 dma-names = "tx", "rx";
208 power-domains = <&cpg>;
209 #sound-dai-cells = <0>;
214 compatible = "renesas,r9a07g044-ssi",
215 "renesas,rz-ssi";
221 interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
225 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
228 dma-names = "rt";
229 power-domains = <&cpg>;
230 #sound-dai-cells = <0>;
235 compatible = "renesas,r9a07g044-ssi",
236 "renesas,rz-ssi";
242 interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
246 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
249 dma-names = "tx", "rx";
250 power-domains = <&cpg>;
251 #sound-dai-cells = <0>;
256 compatible = "renesas,r9a07g044-rspi", "renesas,rspi-rz";
261 interrupt-names = "error", "rx", "tx";
265 dma-names = "tx", "rx";
266 power-domains = <&cpg>;
267 num-cs = <1>;
268 #address-cells = <1>;
269 #size-cells = <0>;
274 compatible = "renesas,r9a07g044-rspi", "renesas,rspi-rz";
279 interrupt-names = "error", "rx", "tx";
283 dma-names = "tx", "rx";
284 power-domains = <&cpg>;
285 num-cs = <1>;
286 #address-cells = <1>;
287 #size-cells = <0>;
292 compatible = "renesas,r9a07g044-rspi", "renesas,rspi-rz";
297 interrupt-names = "error", "rx", "tx";
301 dma-names = "tx", "rx";
302 power-domains = <&cpg>;
303 num-cs = <1>;
304 #address-cells = <1>;
305 #size-cells = <0>;
310 compatible = "renesas,scif-r9a07g044";
318 interrupt-names = "eri", "rxi", "txi",
321 clock-names = "fck";
322 power-domains = <&cpg>;
328 compatible = "renesas,scif-r9a07g044";
336 interrupt-names = "eri", "rxi", "txi",
339 clock-names = "fck";
340 power-domains = <&cpg>;
346 compatible = "renesas,scif-r9a07g044";
354 interrupt-names = "eri", "rxi", "txi",
357 clock-names = "fck";
358 power-domains = <&cpg>;
364 compatible = "renesas,scif-r9a07g044";
372 interrupt-names = "eri", "rxi", "txi",
375 clock-names = "fck";
376 power-domains = <&cpg>;
382 compatible = "renesas,scif-r9a07g044";
390 interrupt-names = "eri", "rxi", "txi",
393 clock-names = "fck";
394 power-domains = <&cpg>;
400 compatible = "renesas,r9a07g044-sci", "renesas,sci";
406 interrupt-names = "eri", "rxi", "txi", "tei";
408 clock-names = "fck";
409 power-domains = <&cpg>;
415 compatible = "renesas,r9a07g044-sci", "renesas,sci";
421 interrupt-names = "eri", "rxi", "txi", "tei";
423 clock-names = "fck";
424 power-domains = <&cpg>;
430 compatible = "renesas,r9a07g044-canfd", "renesas,rzg2l-canfd";
440 interrupt-names = "g_err", "g_recc",
446 clock-names = "fck", "canfd", "can_clk";
447 assigned-clocks = <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>;
448 assigned-clock-rates = <50000000>;
451 reset-names = "rstp_n", "rstc_n";
452 power-domains = <&cpg>;
464 #address-cells = <1>;
465 #size-cells = <0>;
466 compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
476 interrupt-names = "tei", "ri", "ti", "spi", "sti",
479 clock-frequency = <100000>;
481 power-domains = <&cpg>;
486 #address-cells = <1>;
487 #size-cells = <0>;
488 compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
498 interrupt-names = "tei", "ri", "ti", "spi", "sti",
501 clock-frequency = <100000>;
503 power-domains = <&cpg>;
508 #address-cells = <1>;
509 #size-cells = <0>;
510 compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
520 interrupt-names = "tei", "ri", "ti", "spi", "sti",
523 clock-frequency = <100000>;
525 power-domains = <&cpg>;
530 #address-cells = <1>;
531 #size-cells = <0>;
532 compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
542 interrupt-names = "tei", "ri", "ti", "spi", "sti",
545 clock-frequency = <100000>;
547 power-domains = <&cpg>;
552 compatible = "renesas,r9a07g044-adc", "renesas,rzg2l-adc";
557 clock-names = "adclk", "pclk";
560 reset-names = "presetn", "adrst-n";
561 power-domains = <&cpg>;
564 #address-cells = <1>;
565 #size-cells = <0>;
594 compatible = "renesas,r9a07g044-tsu",
595 "renesas,rzg2l-tsu";
599 power-domains = <&cpg>;
600 #thermal-sensor-cells = <1>;
604 compatible = "renesas,r9a07g044-rpc-if",
605 "renesas,rzg2l-rpc-if";
609 reg-names = "regs", "dirmap", "wbuf";
614 power-domains = <&cpg>;
615 #address-cells = <1>;
616 #size-cells = <0>;
620 cpg: clock-controller@11010000 {
621 compatible = "renesas,r9a07g044-cpg";
624 clock-names = "extal";
625 #clock-cells = <2>;
626 #reset-cells = <1>;
627 #power-domain-cells = <0>;
630 sysc: system-controller@11020000 {
631 compatible = "renesas,r9a07g044-sysc";
637 interrupt-names = "lpm_int", "ca55stbydone_int",
643 compatible = "renesas,r9a07g044-pinctrl";
645 gpio-controller;
646 #gpio-cells = <2>;
647 #address-cells = <2>;
648 #interrupt-cells = <2>;
649 interrupt-parent = <&irqc>;
650 interrupt-controller;
651 gpio-ranges = <&pinctrl 0 0 392>;
653 power-domains = <&cpg>;
659 irqc: interrupt-controller@110a0000 {
660 compatible = "renesas,r9a07g044-irqc",
661 "renesas,rzg2l-irqc";
662 #interrupt-cells = <2>;
663 #address-cells = <0>;
664 interrupt-controller;
709 clock-names = "clk", "pclk";
710 power-domains = <&cpg>;
714 dmac: dma-controller@11820000 {
715 compatible = "renesas,r9a07g044-dmac",
716 "renesas,rz-dmac";
736 interrupt-names = "error",
743 power-domains = <&cpg>;
746 #dma-cells = <1>;
747 dma-channels = <16>;
751 compatible = "renesas,r9a07g044-mali",
752 "arm,mali-bifrost";
758 interrupt-names = "job", "mmu", "gpu", "event";
762 clock-names = "gpu", "bus", "bus_ace";
763 power-domains = <&cpg>;
767 reset-names = "rst", "axi_rst", "ace_rst";
768 operating-points-v2 = <&gpu_opp_table>;
771 gic: interrupt-controller@11900000 {
772 compatible = "arm,gic-v3";
773 #interrupt-cells = <3>;
774 #address-cells = <0>;
775 interrupt-controller;
782 compatible = "renesas,sdhi-r9a07g044",
783 "renesas,rcar-gen3-sdhi";
791 clock-names = "core", "clkh", "cd", "aclk";
793 power-domains = <&cpg>;
798 compatible = "renesas,sdhi-r9a07g044",
799 "renesas,rcar-gen3-sdhi";
807 clock-names = "core", "clkh", "cd", "aclk";
809 power-domains = <&cpg>;
814 compatible = "renesas,r9a07g044-gbeth",
815 "renesas,rzg2l-gbeth";
820 interrupt-names = "mux", "fil", "arp_ns";
821 phy-mode = "rgmii";
825 clock-names = "axi", "chi", "refclk";
827 power-domains = <&cpg>;
828 #address-cells = <1>;
829 #size-cells = <0>;
834 compatible = "renesas,r9a07g044-gbeth",
835 "renesas,rzg2l-gbeth";
840 interrupt-names = "mux", "fil", "arp_ns";
841 phy-mode = "rgmii";
845 clock-names = "axi", "chi", "refclk";
847 power-domains = <&cpg>;
848 #address-cells = <1>;
849 #size-cells = <0>;
853 phyrst: usbphy-ctrl@11c40000 {
854 compatible = "renesas,r9a07g044-usbphy-ctrl",
855 "renesas,rzg2l-usbphy-ctrl";
859 power-domains = <&cpg>;
860 #reset-cells = <1>;
865 compatible = "generic-ohci";
873 phy-names = "usb";
874 power-domains = <&cpg>;
879 compatible = "generic-ohci";
887 phy-names = "usb";
888 power-domains = <&cpg>;
893 compatible = "generic-ehci";
901 phy-names = "usb";
903 power-domains = <&cpg>;
908 compatible = "generic-ehci";
916 phy-names = "usb";
918 power-domains = <&cpg>;
922 usb2_phy0: usb-phy@11c50200 {
923 compatible = "renesas,usb2-phy-r9a07g044",
924 "renesas,rzg2l-usb2-phy";
930 #phy-cells = <1>;
931 power-domains = <&cpg>;
935 usb2_phy1: usb-phy@11c70200 {
936 compatible = "renesas,usb2-phy-r9a07g044",
937 "renesas,rzg2l-usb2-phy";
943 #phy-cells = <1>;
944 power-domains = <&cpg>;
949 compatible = "renesas,usbhs-r9a07g044",
950 "renesas,rza2-usbhs";
962 phy-names = "usb";
963 power-domains = <&cpg>;
968 compatible = "renesas,r9a07g044-wdt",
969 "renesas,rzg2l-wdt";
973 clock-names = "pclk", "oscclk";
976 interrupt-names = "wdt", "perrout";
978 power-domains = <&cpg>;
983 compatible = "renesas,r9a07g044-wdt",
984 "renesas,rzg2l-wdt";
988 clock-names = "pclk", "oscclk";
991 interrupt-names = "wdt", "perrout";
993 power-domains = <&cpg>;
998 compatible = "renesas,r9a07g044-wdt",
999 "renesas,rzg2l-wdt";
1003 clock-names = "pclk", "oscclk";
1006 interrupt-names = "wdt", "perrout";
1008 power-domains = <&cpg>;
1013 compatible = "renesas,r9a07g044-ostm",
1019 power-domains = <&cpg>;
1024 compatible = "renesas,r9a07g044-ostm",
1030 power-domains = <&cpg>;
1035 compatible = "renesas,r9a07g044-ostm",
1041 power-domains = <&cpg>;
1046 thermal-zones {
1047 cpu-thermal {
1048 polling-delay-passive = <250>;
1049 polling-delay = <1000>;
1050 thermal-sensors = <&tsu 0>;
1051 sustainable-power = <717>;
1053 cooling-maps {
1056 cooling-device = <&cpu0 0 2>;
1062 sensor_crit: sensor-crit {
1068 target: trip-point {
1078 compatible = "arm,armv8-timer";
1079 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,