Lines Matching +full:0 +full:x10059400
18 #clock-cells = <0>;
20 clock-frequency = <0>;
25 #clock-cells = <0>;
27 clock-frequency = <0>;
33 #clock-cells = <0>;
34 clock-frequency = <0>;
40 #clock-cells = <0>;
42 clock-frequency = <0>;
45 cluster0_opp: opp-table-0 {
74 #size-cells = <0>;
87 cpu0: cpu@0 {
89 reg = <0>;
100 reg = <0x100>;
108 L3_CA55: cache-controller-0 {
111 cache-size = <0x40000>;
174 reg = <0 0x10049c00 0 0x400>;
185 dmas = <&dmac 0x2655>, <&dmac 0x2656>;
188 #sound-dai-cells = <0>;
195 reg = <0 0x1004a000 0 0x400>;
206 dmas = <&dmac 0x2659>, <&dmac 0x265a>;
209 #sound-dai-cells = <0>;
216 reg = <0 0x1004a400 0 0x400>;
227 dmas = <&dmac 0x265f>;
230 #sound-dai-cells = <0>;
237 reg = <0 0x1004a800 0 0x400>;
248 dmas = <&dmac 0x2661>, <&dmac 0x2662>;
251 #sound-dai-cells = <0>;
257 reg = <0 0x1004ac00 0 0x400>;
264 dmas = <&dmac 0x2e95>, <&dmac 0x2e96>;
269 #size-cells = <0>;
275 reg = <0 0x1004b000 0 0x400>;
282 dmas = <&dmac 0x2e99>, <&dmac 0x2e9a>;
287 #size-cells = <0>;
293 reg = <0 0x1004b400 0 0x400>;
300 dmas = <&dmac 0x2e9d>, <&dmac 0x2e9e>;
305 #size-cells = <0>;
311 reg = <0 0x1004b800 0 0x400>;
329 reg = <0 0x1004bc00 0 0x400>;
347 reg = <0 0x1004c000 0 0x400>;
365 reg = <0 0x1004c400 0 0x400>;
383 reg = <0 0x1004c800 0 0x400>;
401 reg = <0 0x1004d000 0 0x400>;
416 reg = <0 0x1004d400 0 0x400>;
431 reg = <0 0x10050000 0 0x8000>;
465 #size-cells = <0>;
467 reg = <0 0x10058000 0 0x400>;
487 #size-cells = <0>;
489 reg = <0 0x10058400 0 0x400>;
509 #size-cells = <0>;
511 reg = <0 0x10058800 0 0x400>;
531 #size-cells = <0>;
533 reg = <0 0x10058c00 0 0x400>;
553 reg = <0 0x10059000 0 0x400>;
565 #size-cells = <0>;
567 channel@0 {
568 reg = <0>;
596 reg = <0 0x10059400 0 0x400>;
606 reg = <0 0x10060000 0 0x10000>,
607 <0 0x20000000 0 0x10000000>,
608 <0 0x10070000 0 0x10000>;
616 #size-cells = <0>;
622 reg = <0 0x11010000 0 0x10000>;
627 #power-domain-cells = <0>;
632 reg = <0 0x11020000 0 0x10000>;
644 reg = <0 0x11030000 0 0x10000>;
651 gpio-ranges = <&pinctrl 0 0 392>;
663 #address-cells = <0>;
665 reg = <0 0x110a0000 0 0x10000>;
666 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
717 reg = <0 0x11820000 0 0x10000>,
718 <0 0x11830000 0 0x10000>;
753 reg = <0x0 0x11840000 0x0 0x10000>;
774 #address-cells = <0>;
776 reg = <0x0 0x11900000 0 0x40000>,
777 <0x0 0x11940000 0 0x60000>;
784 reg = <0x0 0x11c00000 0 0x10000>;
800 reg = <0x0 0x11c10000 0 0x10000>;
816 reg = <0 0x11c20000 0 0x10000>;
829 #size-cells = <0>;
836 reg = <0 0x11c30000 0 0x10000>;
849 #size-cells = <0>;
856 reg = <0 0x11c40000 0 0x10000>;
866 reg = <0 0x11c50000 0 0x100>;
870 resets = <&phyrst 0>,
880 reg = <0 0x11c70000 0 0x100>;
894 reg = <0 0x11c50100 0 0x100>;
898 resets = <&phyrst 0>,
909 reg = <0 0x11c70100 0 0x100>;
925 reg = <0 0x11c50200 0 0x700>;
929 resets = <&phyrst 0>;
938 reg = <0 0x11c70200 0 0x700>;
951 reg = <0 0x11c60000 0 0x10000>;
958 resets = <&phyrst 0>,
970 reg = <0 0x12800800 0 0x400>;
985 reg = <0 0x12800C00 0 0x400>;
1000 reg = <0 0x12800400 0 0x400>;
1015 reg = <0x0 0x12801000 0x0 0x400>;
1026 reg = <0x0 0x12801400 0x0 0x400>;
1037 reg = <0x0 0x12801800 0x0 0x400>;
1050 thermal-sensors = <&tsu 0>;
1056 cooling-device = <&cpu0 0 2>;