Lines Matching +full:adrst +full:- +full:n
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g043-cpg.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
23 audio_clk2: audio2-clk {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
27 clock-frequency = <0>;
30 /* External CAN clock - to be overridden by boards that provide it */
31 can_clk: can-clk {
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <0>;
38 extal_clk: extal-clk {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
42 clock-frequency = <0>;
45 cluster0_opp: opp-table-0 {
46 compatible = "operating-points-v2";
47 opp-shared;
49 opp-125000000 {
50 opp-hz = /bits/ 64 <125000000>;
51 opp-microvolt = <1100000>;
52 clock-latency-ns = <300000>;
54 opp-250000000 {
55 opp-hz = /bits/ 64 <250000000>;
56 opp-microvolt = <1100000>;
57 clock-latency-ns = <300000>;
59 opp-500000000 {
60 opp-hz = /bits/ 64 <500000000>;
61 opp-microvolt = <1100000>;
62 clock-latency-ns = <300000>;
64 opp-1000000000 {
65 opp-hz = /bits/ 64 <1000000000>;
66 opp-microvolt = <1100000>;
67 clock-latency-ns = <300000>;
68 opp-suspend;
73 #address-cells = <1>;
74 #size-cells = <0>;
77 compatible = "arm,cortex-a55";
80 #cooling-cells = <2>;
81 next-level-cache = <&L3_CA55>;
82 enable-method = "psci";
84 operating-points-v2 = <&cluster0_opp>;
87 L3_CA55: cache-controller-0 {
89 cache-unified;
90 cache-size = <0x40000>;
95 compatible = "arm,psci-1.0", "arm,psci-0.2";
100 compatible = "simple-bus";
101 interrupt-parent = <&gic>;
102 #address-cells = <2>;
103 #size-cells = <2>;
107 compatible = "renesas,r9a07g043-ssi",
108 "renesas,rz-ssi";
114 interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
118 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
121 dma-names = "tx", "rx";
122 power-domains = <&cpg>;
123 #sound-dai-cells = <0>;
128 compatible = "renesas,r9a07g043-ssi",
129 "renesas,rz-ssi";
135 interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
139 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
142 dma-names = "tx", "rx";
143 power-domains = <&cpg>;
144 #sound-dai-cells = <0>;
149 compatible = "renesas,r9a07g043-ssi",
150 "renesas,rz-ssi";
156 interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
160 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
163 dma-names = "rt";
164 power-domains = <&cpg>;
165 #sound-dai-cells = <0>;
170 compatible = "renesas,r9a07g043-ssi",
171 "renesas,rz-ssi";
177 interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
181 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
184 dma-names = "tx", "rx";
185 power-domains = <&cpg>;
186 #sound-dai-cells = <0>;
191 compatible = "renesas,r9a07g043-rspi", "renesas,rspi-rz";
196 interrupt-names = "error", "rx", "tx";
200 dma-names = "tx", "rx";
201 power-domains = <&cpg>;
202 num-cs = <1>;
203 #address-cells = <1>;
204 #size-cells = <0>;
209 compatible = "renesas,r9a07g043-rspi", "renesas,rspi-rz";
214 interrupt-names = "error", "rx", "tx";
218 dma-names = "tx", "rx";
219 power-domains = <&cpg>;
220 num-cs = <1>;
221 #address-cells = <1>;
222 #size-cells = <0>;
227 compatible = "renesas,r9a07g043-rspi", "renesas,rspi-rz";
232 interrupt-names = "error", "rx", "tx";
236 dma-names = "tx", "rx";
237 power-domains = <&cpg>;
238 num-cs = <1>;
239 #address-cells = <1>;
240 #size-cells = <0>;
245 compatible = "renesas,scif-r9a07g043",
246 "renesas,scif-r9a07g044";
254 interrupt-names = "eri", "rxi", "txi",
257 clock-names = "fck";
258 power-domains = <&cpg>;
264 compatible = "renesas,scif-r9a07g043",
265 "renesas,scif-r9a07g044";
273 interrupt-names = "eri", "rxi", "txi",
276 clock-names = "fck";
277 power-domains = <&cpg>;
283 compatible = "renesas,scif-r9a07g043",
284 "renesas,scif-r9a07g044";
292 interrupt-names = "eri", "rxi", "txi",
295 clock-names = "fck";
296 power-domains = <&cpg>;
302 compatible = "renesas,scif-r9a07g043",
303 "renesas,scif-r9a07g044";
311 interrupt-names = "eri", "rxi", "txi",
314 clock-names = "fck";
315 power-domains = <&cpg>;
321 compatible = "renesas,scif-r9a07g043",
322 "renesas,scif-r9a07g044";
330 interrupt-names = "eri", "rxi", "txi",
333 clock-names = "fck";
334 power-domains = <&cpg>;
340 compatible = "renesas,r9a07g043-sci", "renesas,sci";
346 interrupt-names = "eri", "rxi", "txi", "tei";
348 clock-names = "fck";
349 power-domains = <&cpg>;
355 compatible = "renesas,r9a07g043-sci", "renesas,sci";
361 interrupt-names = "eri", "rxi", "txi", "tei";
363 clock-names = "fck";
364 power-domains = <&cpg>;
370 compatible = "renesas,r9a07g043-canfd", "renesas,rzg2l-canfd";
380 interrupt-names = "g_err", "g_recc",
386 clock-names = "fck", "canfd", "can_clk";
387 assigned-clocks = <&cpg CPG_CORE R9A07G043_CLK_P0_DIV2>;
388 assigned-clock-rates = <50000000>;
391 reset-names = "rstp_n", "rstc_n";
392 power-domains = <&cpg>;
404 #address-cells = <1>;
405 #size-cells = <0>;
406 compatible = "renesas,riic-r9a07g043", "renesas,riic-rz";
416 interrupt-names = "tei", "ri", "ti", "spi", "sti",
419 clock-frequency = <100000>;
421 power-domains = <&cpg>;
426 #address-cells = <1>;
427 #size-cells = <0>;
428 compatible = "renesas,riic-r9a07g043", "renesas,riic-rz";
438 interrupt-names = "tei", "ri", "ti", "spi", "sti",
441 clock-frequency = <100000>;
443 power-domains = <&cpg>;
448 #address-cells = <1>;
449 #size-cells = <0>;
450 compatible = "renesas,riic-r9a07g043", "renesas,riic-rz";
460 interrupt-names = "tei", "ri", "ti", "spi", "sti",
463 clock-frequency = <100000>;
465 power-domains = <&cpg>;
470 #address-cells = <1>;
471 #size-cells = <0>;
472 compatible = "renesas,riic-r9a07g043", "renesas,riic-rz";
482 interrupt-names = "tei", "ri", "ti", "spi", "sti",
485 clock-frequency = <100000>;
487 power-domains = <&cpg>;
492 compatible = "renesas,r9a07g043-adc", "renesas,rzg2l-adc";
497 clock-names = "adclk", "pclk";
500 reset-names = "presetn", "adrst-n";
501 power-domains = <&cpg>;
504 #address-cells = <1>;
505 #size-cells = <0>;
516 compatible = "renesas,r9a07g043-tsu",
517 "renesas,rzg2l-tsu";
521 power-domains = <&cpg>;
522 #thermal-sensor-cells = <1>;
526 compatible = "renesas,r9a07g043-rpc-if",
527 "renesas,rzg2l-rpc-if";
531 reg-names = "regs", "dirmap", "wbuf";
535 power-domains = <&cpg>;
536 #address-cells = <1>;
537 #size-cells = <0>;
541 cpg: clock-controller@11010000 {
542 compatible = "renesas,r9a07g043-cpg";
545 clock-names = "extal";
546 #clock-cells = <2>;
547 #reset-cells = <1>;
548 #power-domain-cells = <0>;
551 sysc: system-controller@11020000 {
552 compatible = "renesas,r9a07g043-sysc";
558 interrupt-names = "lpm_int", "ca55stbydone_int",
564 compatible = "renesas,r9a07g043-pinctrl";
566 gpio-controller;
567 #gpio-cells = <2>;
568 gpio-ranges = <&pinctrl 0 0 152>;
570 power-domains = <&cpg>;
576 dmac: dma-controller@11820000 {
577 compatible = "renesas,r9a07g043-dmac",
578 "renesas,rz-dmac";
598 interrupt-names = "error",
605 power-domains = <&cpg>;
608 #dma-cells = <1>;
609 dma-channels = <16>;
612 gic: interrupt-controller@11900000 {
613 compatible = "arm,gic-v3";
614 #interrupt-cells = <3>;
615 #address-cells = <0>;
616 interrupt-controller;
623 compatible = "renesas,sdhi-r9a07g043",
624 "renesas,rcar-gen3-sdhi";
632 clock-names = "core", "clkh", "cd", "aclk";
634 power-domains = <&cpg>;
639 compatible = "renesas,sdhi-r9a07g043",
640 "renesas,rcar-gen3-sdhi";
648 clock-names = "core", "clkh", "cd", "aclk";
650 power-domains = <&cpg>;
655 compatible = "renesas,r9a07g043-gbeth",
656 "renesas,rzg2l-gbeth";
661 interrupt-names = "mux", "fil", "arp_ns";
662 phy-mode = "rgmii";
666 clock-names = "axi", "chi", "refclk";
668 power-domains = <&cpg>;
669 #address-cells = <1>;
670 #size-cells = <0>;
675 compatible = "renesas,r9a07g043-gbeth",
676 "renesas,rzg2l-gbeth";
681 interrupt-names = "mux", "fil", "arp_ns";
682 phy-mode = "rgmii";
686 clock-names = "axi", "chi", "refclk";
688 power-domains = <&cpg>;
689 #address-cells = <1>;
690 #size-cells = <0>;
694 phyrst: usbphy-ctrl@11c40000 {
695 compatible = "renesas,r9a07g043-usbphy-ctrl",
696 "renesas,rzg2l-usbphy-ctrl";
700 power-domains = <&cpg>;
701 #reset-cells = <1>;
706 compatible = "generic-ohci";
714 phy-names = "usb";
715 power-domains = <&cpg>;
720 compatible = "generic-ohci";
728 phy-names = "usb";
729 power-domains = <&cpg>;
734 compatible = "generic-ehci";
742 phy-names = "usb";
744 power-domains = <&cpg>;
749 compatible = "generic-ehci";
757 phy-names = "usb";
759 power-domains = <&cpg>;
763 usb2_phy0: usb-phy@11c50200 {
764 compatible = "renesas,usb2-phy-r9a07g043",
765 "renesas,rzg2l-usb2-phy";
771 #phy-cells = <1>;
772 power-domains = <&cpg>;
776 usb2_phy1: usb-phy@11c70200 {
777 compatible = "renesas,usb2-phy-r9a07g043",
778 "renesas,rzg2l-usb2-phy";
784 #phy-cells = <1>;
785 power-domains = <&cpg>;
790 compatible = "renesas,usbhs-r9a07g043",
791 "renesas,rza2-usbhs";
803 phy-names = "usb";
804 power-domains = <&cpg>;
809 compatible = "renesas,r9a07g043-wdt",
810 "renesas,rzg2l-wdt";
814 clock-names = "pclk", "oscclk";
817 interrupt-names = "wdt", "perrout";
819 power-domains = <&cpg>;
824 compatible = "renesas,r9a07g043-wdt",
825 "renesas,rzg2l-wdt";
829 clock-names = "pclk", "oscclk";
832 interrupt-names = "wdt", "perrout";
834 power-domains = <&cpg>;
839 compatible = "renesas,r9a07g043-ostm",
845 power-domains = <&cpg>;
850 compatible = "renesas,r9a07g043-ostm",
856 power-domains = <&cpg>;
861 compatible = "renesas,r9a07g043-ostm",
867 power-domains = <&cpg>;
872 thermal-zones {
873 cpu-thermal {
874 polling-delay-passive = <250>;
875 polling-delay = <1000>;
876 thermal-sensors = <&tsu 0>;
877 sustainable-power = <717>;
879 cooling-maps {
882 cooling-device = <&cpu0 0 2>;
888 sensor_crit: sensor-crit {
894 target: trip-point {
904 compatible = "arm,armv8-timer";
905 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,