Lines Matching +full:0 +full:xe6020000

19 		#size-cells = <0>;
21 		a76_0: cpu@0 {
23 			reg = <0>;
31 		#clock-cells = <0>;
33 		clock-frequency = <0>;
38 		#clock-cells = <0>;
40 		clock-frequency = <0>;
51 		#clock-cells = <0>;
52 		clock-frequency = <0>;
65 			reg = <0 0xe6020000 0 0x0c>;
75 			reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>,
76 			      <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>,
77 			      <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>,
78 			      <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>,
79 			      <0 0xe6068000 0 0x16c>;
85 			reg = <0 0xe6050180 0 0x54>;
92 			gpio-ranges = <&pfc 0 0 19>;
100 			reg = <0 0xe6050980 0 0x54>;
107 			gpio-ranges = <&pfc 0 32 29>;
115 			reg = <0 0xe6058180 0 0x54>;
122 			gpio-ranges = <&pfc 0 64 20>;
130 			reg = <0 0xe6058980 0 0x54>;
137 			gpio-ranges = <&pfc 0 96 30>;
145 			reg = <0 0xe6060180 0 0x54>;
152 			gpio-ranges = <&pfc 0 128 25>;
160 			reg = <0 0xe6060980 0 0x54>;
167 			gpio-ranges = <&pfc 0 160 21>;
175 			reg = <0 0xe6061180 0 0x54>;
182 			gpio-ranges = <&pfc 0 192 21>;
190 			reg = <0 0xe6061980 0 0x54>;
197 			gpio-ranges = <&pfc 0 224 21>;
205 			reg = <0 0xe6068180 0 0x54>;
212 			gpio-ranges = <&pfc 0 256 14>;
219 			reg = <0 0xe6150000 0 0x4000>;
223 			#power-domain-cells = <0>;
229 			reg = <0 0xe6160000 0 0x4000>;
234 			reg = <0 0xe6180000 0 0x4000>;
241 			reg = <0 0xe6500000 0 0x40>;
248 			#size-cells = <0>;
255 			reg = <0 0xe6508000 0 0x40>;
262 			#size-cells = <0>;
269 			reg = <0 0xe6510000 0 0x40>;
276 			#size-cells = <0>;
283 			reg = <0 0xe66d0000 0 0x40>;
290 			#size-cells = <0>;
297 			reg = <0 0xe66d8000 0 0x40>;
304 			#size-cells = <0>;
311 			reg = <0 0xe66e0000 0 0x40>;
318 			#size-cells = <0>;
326 			reg = <0 0xe6540000 0 96>;
340 			reg = <0 0xe6800000 0 0x800>;
377 			rx-internal-delay-ps = <0>;
378 			tx-internal-delay-ps = <0>;
380 			#size-cells = <0>;
387 			reg = <0 0xe6810000 0 0x800>;
424 			rx-internal-delay-ps = <0>;
425 			tx-internal-delay-ps = <0>;
427 			#size-cells = <0>;
434 			reg = <0 0xe6820000 0 0x1000>;
471 			rx-internal-delay-ps = <0>;
472 			tx-internal-delay-ps = <0>;
474 			#size-cells = <0>;
481 			#address-cells = <0>;
483 			reg = <0x0 0xf1000000 0 0x20000>,
484 			      <0x0 0xf1060000 0 0x110000>;
491 			reg = <0 0xfff00044 0 4>;