Lines Matching full:cpg
8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
82 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
94 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
164 clocks = <&cpg CPG_MOD 402>;
166 resets = <&cpg 402>;
180 clocks = <&cpg CPG_MOD 912>;
182 resets = <&cpg 912>;
195 clocks = <&cpg CPG_MOD 911>;
197 resets = <&cpg 911>;
210 clocks = <&cpg CPG_MOD 910>;
212 resets = <&cpg 910>;
225 clocks = <&cpg CPG_MOD 909>;
227 resets = <&cpg 909>;
240 clocks = <&cpg CPG_MOD 908>;
242 resets = <&cpg 908>;
255 clocks = <&cpg CPG_MOD 907>;
257 resets = <&cpg 907>;
270 clocks = <&cpg CPG_MOD 906>;
272 resets = <&cpg 906>;
288 clocks = <&cpg CPG_MOD 926>;
290 resets = <&cpg 926>;
302 clocks = <&cpg CPG_MOD 303>;
305 resets = <&cpg 303>;
321 clocks = <&cpg CPG_MOD 302>;
324 resets = <&cpg 302>;
340 clocks = <&cpg CPG_MOD 301>;
343 resets = <&cpg 301>;
359 clocks = <&cpg CPG_MOD 300>;
362 resets = <&cpg 300>;
366 cpg: clock-controller@e6150000 { label
367 compatible = "renesas,r8a77990-cpg-mssr";
393 clocks = <&cpg CPG_MOD 522>;
395 resets = <&cpg 522>;
410 clocks = <&cpg CPG_MOD 407>;
412 resets = <&cpg 407>;
421 clocks = <&cpg CPG_MOD 125>;
424 resets = <&cpg 125>;
434 clocks = <&cpg CPG_MOD 124>;
437 resets = <&cpg 124>;
447 clocks = <&cpg CPG_MOD 123>;
450 resets = <&cpg 123>;
460 clocks = <&cpg CPG_MOD 122>;
463 resets = <&cpg 122>;
473 clocks = <&cpg CPG_MOD 121>;
476 resets = <&cpg 121>;
487 clocks = <&cpg CPG_MOD 931>;
489 resets = <&cpg 931>;
504 clocks = <&cpg CPG_MOD 930>;
506 resets = <&cpg 930>;
521 clocks = <&cpg CPG_MOD 929>;
523 resets = <&cpg 929>;
538 clocks = <&cpg CPG_MOD 928>;
540 resets = <&cpg 928>;
554 clocks = <&cpg CPG_MOD 927>;
556 resets = <&cpg 927>;
570 clocks = <&cpg CPG_MOD 919>;
572 resets = <&cpg 919>;
586 clocks = <&cpg CPG_MOD 918>;
588 resets = <&cpg 918>;
602 clocks = <&cpg CPG_MOD 1003>;
604 resets = <&cpg 1003>;
615 clocks = <&cpg CPG_MOD 520>,
616 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
623 resets = <&cpg 520>;
633 clocks = <&cpg CPG_MOD 519>,
634 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
641 resets = <&cpg 519>;
651 clocks = <&cpg CPG_MOD 518>,
652 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
659 resets = <&cpg 518>;
669 clocks = <&cpg CPG_MOD 517>,
670 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
676 resets = <&cpg 517>;
686 clocks = <&cpg CPG_MOD 516>,
687 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
693 resets = <&cpg 516>;
702 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
710 resets = <&cpg 704>, <&cpg 703>;
721 clocks = <&cpg CPG_MOD 330>;
723 resets = <&cpg 330>;
735 clocks = <&cpg CPG_MOD 331>;
737 resets = <&cpg 331>;
746 clocks = <&cpg CPG_MOD 229>;
747 resets = <&cpg 229>;
777 clocks = <&cpg CPG_MOD 219>;
780 resets = <&cpg 219>;
819 clocks = <&cpg CPG_MOD 218>;
822 resets = <&cpg 218>;
861 clocks = <&cpg CPG_MOD 217>;
864 resets = <&cpg 217>;
994 clocks = <&cpg CPG_MOD 812>;
997 resets = <&cpg 812>;
1011 clocks = <&cpg CPG_MOD 916>,
1012 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1015 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1018 resets = <&cpg 916>;
1027 clocks = <&cpg CPG_MOD 915>,
1028 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1031 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1034 resets = <&cpg 915>;
1045 clocks = <&cpg CPG_MOD 914>,
1046 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1049 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1052 resets = <&cpg 914>;
1067 clocks = <&cpg CPG_MOD 523>;
1069 resets = <&cpg 523>;
1077 clocks = <&cpg CPG_MOD 523>;
1079 resets = <&cpg 523>;
1087 clocks = <&cpg CPG_MOD 523>;
1089 resets = <&cpg 523>;
1097 clocks = <&cpg CPG_MOD 523>;
1099 resets = <&cpg 523>;
1107 clocks = <&cpg CPG_MOD 523>;
1109 resets = <&cpg 523>;
1117 clocks = <&cpg CPG_MOD 523>;
1119 resets = <&cpg 523>;
1127 clocks = <&cpg CPG_MOD 523>;
1129 resets = <&cpg 523>;
1139 clocks = <&cpg CPG_MOD 207>,
1140 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1147 resets = <&cpg 207>;
1156 clocks = <&cpg CPG_MOD 206>,
1157 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1164 resets = <&cpg 206>;
1173 clocks = <&cpg CPG_MOD 310>,
1174 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1181 resets = <&cpg 310>;
1190 clocks = <&cpg CPG_MOD 204>,
1191 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1197 resets = <&cpg 204>;
1206 clocks = <&cpg CPG_MOD 203>,
1207 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1213 resets = <&cpg 203>;
1222 clocks = <&cpg CPG_MOD 202>,
1223 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1229 resets = <&cpg 202>;
1238 clocks = <&cpg CPG_MOD 211>;
1243 resets = <&cpg 211>;
1254 clocks = <&cpg CPG_MOD 210>;
1258 resets = <&cpg 210>;
1269 clocks = <&cpg CPG_MOD 209>;
1273 resets = <&cpg 209>;
1284 clocks = <&cpg CPG_MOD 208>;
1288 resets = <&cpg 208>;
1298 clocks = <&cpg CPG_MOD 807>;
1300 resets = <&cpg 807>;
1326 clocks = <&cpg CPG_MOD 806>;
1328 resets = <&cpg 806>;
1355 clocks = <&cpg CPG_MOD 515>;
1360 resets = <&cpg 515>;
1370 clocks = <&cpg CPG_MOD 514>;
1375 resets = <&cpg 514>;
1385 clocks = <&cpg CPG_MOD 513>;
1390 resets = <&cpg 513>;
1400 clocks = <&cpg CPG_MOD 512>;
1405 resets = <&cpg 512>;
1415 clocks = <&cpg CPG_MOD 511>;
1420 resets = <&cpg 511>;
1430 clocks = <&cpg CPG_MOD 510>;
1435 resets = <&cpg 510>;
1445 clocks = <&cpg CPG_MOD 509>;
1450 resets = <&cpg 509>;
1460 clocks = <&cpg CPG_MOD 508>;
1465 resets = <&cpg 508>;
1491 clocks = <&cpg CPG_MOD 1005>,
1492 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1493 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1494 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1495 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1496 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1497 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1498 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1499 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1500 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1501 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1502 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1503 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1504 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1507 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1520 resets = <&cpg 1005>,
1521 <&cpg 1006>, <&cpg 1007>,
1522 <&cpg 1008>, <&cpg 1009>,
1523 <&cpg 1010>, <&cpg 1011>,
1524 <&cpg 1012>, <&cpg 1013>,
1525 <&cpg 1014>, <&cpg 1015>;
1682 clocks = <&cpg CPG_MOD 802>;
1684 resets = <&cpg 802>;
1714 clocks = <&cpg CPG_MOD 502>;
1717 resets = <&cpg 502>;
1735 clocks = <&cpg CPG_MOD 328>;
1737 resets = <&cpg 328>;
1746 clocks = <&cpg CPG_MOD 328>;
1748 resets = <&cpg 328>;
1756 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1760 resets = <&cpg 703>, <&cpg 704>;
1768 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1773 resets = <&cpg 703>, <&cpg 704>;
1782 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1784 resets = <&cpg 703>, <&cpg 704>;
1794 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>;
1798 resets = <&cpg 314>;
1808 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>;
1812 resets = <&cpg 313>;
1822 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>;
1826 resets = <&cpg 311>;
1839 clocks = <&cpg CPG_MOD 917>;
1841 resets = <&cpg 917>;
1858 clocks = <&cpg CPG_MOD 408>;
1861 resets = <&cpg 408>;
1884 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1887 resets = <&cpg 319>;
1895 clocks = <&cpg CPG_MOD 626>;
1897 resets = <&cpg 626>;
1904 clocks = <&cpg CPG_MOD 607>;
1906 resets = <&cpg 607>;
1914 clocks = <&cpg CPG_MOD 631>;
1916 resets = <&cpg 631>;
1923 clocks = <&cpg CPG_MOD 611>;
1925 resets = <&cpg 611>;
1933 clocks = <&cpg CPG_MOD 623>;
1935 resets = <&cpg 623>;
1942 clocks = <&cpg CPG_MOD 603>;
1944 resets = <&cpg 603>;
1952 clocks = <&cpg CPG_MOD 622>;
1954 resets = <&cpg 622>;
1961 clocks = <&cpg CPG_MOD 602>;
1963 resets = <&cpg 602>;
1972 clocks = <&cpg CPG_MOD 711>;
1973 resets = <&cpg 711>;
1981 clocks = <&cpg CPG_MOD 710>;
1982 resets = <&cpg 710>;
1989 clocks = <&cpg CPG_MOD 716>;
1991 resets = <&cpg 716>;
2025 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
2027 resets = <&cpg 724>;
2062 clocks = <&cpg CPG_MOD 727>;
2064 resets = <&cpg 727>;
2089 clocks = <&cpg CPG_MOD 727>;
2091 resets = <&cpg 726>;